Commit Graph

45266 Commits

Author SHA1 Message Date
Xiang Xiao
44ad6d0a23 arch/arm: Remove FAR and CODE from chip folder(2)
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-05-03 16:50:52 +03:00
Xiang Xiao
03c31d332f arch/arm: Remove FAR and CODE from chip folder(1)
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-05-03 16:50:52 +03:00
Xiang Xiao
fead1964cb boards/space: Remove the unneeded XXXEXT definition
these make variable is defined in common place now

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-05-03 16:48:35 +03:00
Ville Juven
248b738f25 arm_addrenv: Add stubs for modifying permissions
Adds stubs for up_addrenv_text_enable/disable_write. These don't have
to do anything as the ARM MMU allows setting access per mode. Currently
the settings for user .text area grants the kernel write access, but
revokes user write access.
2022-05-03 21:25:25 +09:00
Ville Juven
9af8b740e6 Elf loader: give temporary write access to user .text memory
When the .elf file is loaded from disk, the kernel must be given write
access to the allocated .text section in the task's address environment.

The access is removed after the elf is loaded and relocations are done.

NOTE:
The reason this works for the ARM implementation, is that the ARM MMU
can be configured to give write access for the privileged mode, but
revoke write access for the user mode.

Regardless, it would be smart to revoke write access even for the
kernel, when the kernel does not need it. This framework allows doing
that, if someone wishes to take up the task.
2022-05-03 21:25:25 +09:00
Oki Minabe
0ba891c1b0 armv7-a: smp: fix stack coloration
Summary:
- The stack pointer is subtracted to alloc xcptcontext area
  in the __cpu?_start block
- Fix the stack coloration overrun to the previous cpu's xcpt area

Impact:
- armv7-a's smp configuration

Testing:
- smp and ostest on sabre-6quad:smp w/ qemu

Signed-off-by: Oki Minabe <minabe.oki@gmail.com>
2022-05-03 19:12:04 +08:00
Masayuki Ishikawa
0908c67d73 boards: rv-virt: Add support ELF to nsh and nsh64 defconfigs
Summary:
- This commit adds support ELF to nsh and nsh64 defconfigs

Impact:
- None

Testing:
  nsh> mount -t hostfs -o fs=../apps/bin /system/bin
  nsh> hello
  Hello, World!!

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-05-03 13:57:24 +08:00
Ville Juven
2fd29b6408 RISC-V: Fix bug in riscv_addrenv.c
Need 1 full page extra for heap, not 1 byte.
2022-05-03 03:05:22 +08:00
Masayuki Ishikawa
9b20f97064 boards: rv-virt: Add hostfs support to nsh and nsh64 defconfigs
Summary:
- This commit adds hostfs support to nsh and nsh64 defconfigs

Impact:
- None

Testing:
- Tested with qemu-6.2

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-05-02 19:46:58 +08:00
Masayuki Ishikawa
5a9b2920e8 arch: risc-v: Add support for semihosting and hostfs
Summary:
- This commit adds support for semihosting and hostfs

Impact:
- None

Testing:
- Tested with nsh and nsh64 (defconfig will be updated later)

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-05-02 19:46:58 +08:00
Ville Juven
9c5fb9ec8d binfmt_execmodule: Use heap size getter for print 2022-05-02 17:06:08 +08:00
Ville Juven
0ae2e68116 RISC-V: Temporarily disable error about missing SBI 2022-05-02 16:13:15 +08:00
Ville Juven
a5d49140ea MPFS: Add dummy rofms image
To allow building with ROMFS enabled
2022-05-02 16:13:15 +08:00
Ville Juven
31b916c485 MPFS: Add kernel space mappings
Mappings are done with vaddr=paddr.
- I/O space mapped with two gigapages
- Kernel space mapped to statically allocated page tables. 2MB of kernel
  memory is supported.
- Page pool is mapped to the kernel space, to allow virtual memory access
  for the kernel e.g. to initialize the page memory when it is allocated.
2022-05-02 16:13:15 +08:00
Ville Juven
2287ebcbcf MPFS: Add knsh (CONFIG_BUILD_KERNEL=y)
Re-name the old knsh (CONFIG_BUILD_PROTECTED=y) to pnsh
2022-05-02 16:13:15 +08:00
Ville Juven
3f6504076e MPFS: Add page pool allocation 2022-05-02 16:13:15 +08:00
Ville Juven
cccfe31d0c MPFS: Add sources for CONFIG_ARCH_ADDRENV 2022-05-02 16:13:15 +08:00
Ville Juven
6bf8623897 RISC-V: Fix crt0 file compilation
Definition of STACK_FRAME_SIZE was moved
2022-05-02 16:10:47 +08:00
Masayuki Ishikawa
7b6ac23277 boards: sabre-6quad: Add defconfig for libcxx
Summary:
- This commit adds defconfig for libcxx

Impact:
- None

Testing:
- Tested with QEMU

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-05-02 10:24:16 +03:00
Masayuki Ishikawa
c5af689180 boards: sabre-6quad: Fix dramboot.ld for libcxx
Summary:
- I noticed that cxxtest does not work correctly.
- Finally, I found that initializers for c++ is not called.
- This commit fixes this issue

Impact:
- None

Testing:
- Tested with cxxtest (defconfig will be added later)

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-05-02 10:24:16 +03:00
Xiang Xiao
f77a0ec7fa arch: Move -finstrument-functions from Make.defs to Toolchain.defs
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-05-01 23:54:15 +03:00
Xiang Xiao
1fde7e17bb arch: Move -fstack-protector-all from Make.defs to Toolchain.defs
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-05-01 23:54:15 +03:00
Xiang Xiao
aeb9c5d822 boards: Move -fno-strict-aliasing from Make.defs to Toolchain.defs
and migrate MAXOPTIMIZATION into ARCHOPTIMIZATION

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-05-01 11:36:41 +03:00
Xiang Xiao
1e23799455 arch/riscv: Optimize the syscall performance in kernel mode
by renaming riscv_dispatch_syscall to sys_callx, so the caller
don't need the immediate step(syscallx->riscv_dispatch_syscall)

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-05-01 11:31:01 +03:00
Xiang Xiao
efce8bd198 Revert "arch/risc-v: use STACK_FRAME_SIZE for in S-mode syscall asm"
This reverts commit 9b7f9867aa.
2022-05-01 11:31:01 +03:00
Xiang Xiao
a021177de8 arch: Fix the style found in review
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-05-01 11:29:44 +03:00
Xiang Xiao
4a03cab6f9 libc: Remove the redundant seek in writev
since the file position isn't changed if write return fail

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-05-01 10:07:36 +03:00
Xiang Xiao
220f1dd6a0 boards: run tools/refresh.sh to normalize defconfig
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-05-01 09:50:50 +03:00
Xiang Xiao
05ff19d17b tools/testbuild.sh: Don't skip configure and distclean
to improve the test coverage

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-05-01 09:50:50 +03:00
chao.an
5db447623d arm/cxd56xx/lc823450/rp2040: replace arch testset to board implement
This patch to resolve the regression which leads to the breakage of spresense:smp

Signed-off-by: chao.an <anchao@xiaomi.com>
2022-05-01 06:38:25 +09:00
chao.an
3ec2f70046 arch/arm/Make.defs: unify arch common source include
Signed-off-by: chao.an <anchao@xiaomi.com>
2022-04-30 21:50:16 +08:00
chao.an
8951b0135b arch/cortex-[a|r]/Make.defs: unify arch common source include
Signed-off-by: chao.an <anchao@xiaomi.com>
2022-04-30 21:50:16 +08:00
chao.an
5677fe2153 arch/cortex-m/Make.defs: unify arch common source include
Signed-off-by: chao.an <anchao@xiaomi.com>
2022-04-30 21:50:16 +08:00
chao.an
a560eb5f8d arch/arm/Make.defs: unify common source include
Signed-off-by: chao.an <anchao@xiaomi.com>
2022-04-30 21:50:16 +08:00
Xiang Xiao
2a95be5086 arch/avr: Remvoe the error message when toolchain can't find
to avoid blocking the basic ci check

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-04-30 01:20:11 -03:00
Xiang Xiao
baf852ff4b tools/ci: Enable libcxx test config
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-04-29 21:08:14 -03:00
Xiang Xiao
b12c0a1e31 boards: Remove -std=c++1x from Make.defs
let the implementation of standard library choice what they want

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-04-29 21:08:14 -03:00
Xiang Xiao
7f91fcdf89 boards/arm: Remove the unneeded C++ config from stm32l4/nucleo-l476rg
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-04-29 21:08:14 -03:00
Xiang Xiao
94cb0c6072 arch: Move -nostdinc++ to Tooolchain.defs
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-04-29 21:08:14 -03:00
Xiang Xiao
c1e5ba4602 libxx: Always build libcxx with -std=c++17
since the implementation of barrier require
the aligned new which is defined in C++ 17

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-04-29 21:08:14 -03:00
Simon Filgis
385519302e Corrected typo in sam_spi.c. Debaugcall needs cs not if as ref...
Signed-off-by: Simon Filgis <simon@ingenieurbuero-filgis.de>
2022-04-30 03:13:38 +08:00
Oki Minabe
c38234e342 armv7-a/r: use cps instruction to change cpu mode
Summary:
- Use CPS instruction to change cpu mode for code simplification
- CPS which changes cpu mode is available in armv6 and above

Impact:
- armv7-a/r

Testing:
- smp and ostest on sabre-6quad:smp w/ qemu

Signed-off-by: Oki Minabe <minabe.oki@gmail.com>
2022-04-30 03:13:22 +08:00
Ville Juven
b3baf95835 UMM: Implement getter for address environment heap start vaddr
Using the Kconfig macro does not work for RISC-V target, as there the
user heap follows .data/.bss and does not obey any Kconfig provided
boundary.

Added stubs for ARM and Z80 also.
2022-04-29 23:13:16 +08:00
wangbowen6
dcb440a4d9 libc/arch_atomic: add FAR to pointers.
Signed-off-by: wangbowen6 <wangbowen6@xiaomi.com>
2022-04-29 15:06:11 +08:00
wangbowen6
ea164f28b8 libc/arch_atomic: add gcc legacy __sync buitins support.
Signed-off-by: wangbowen6 <wangbowen6@xiaomi.com>
2022-04-29 15:06:11 +08:00
Sergey Nikitenko
19c5ac9135 stm32l4 fix ECCR comment 2022-04-29 09:30:09 +03:00
Sergey Nikitenko
3cc8d7d52a stm32l4 rtcc register fixes 2022-04-29 09:30:09 +03:00
Sergey Nikitenko
0b9a36d142 stm32l4 fix tim channel range checking 2022-04-29 09:30:09 +03:00
Sergey Nikitenko
541b03b787 stm32l4 TIM register fixes 2022-04-29 09:30:09 +03:00
Sergey Nikitenko
57c64d327e stm32l4 FLASH_CR_FSTPG register fix 2022-04-29 09:30:09 +03:00