Commit Graph

15790 Commits

Author SHA1 Message Date
Fotis Panagiotopoulos
b2659424d5 lpc17_40 i2c: Fix I2C driver state desynchronization. 2024-04-25 01:24:40 +08:00
Yanfeng Liu
5c3fc2796b tools/export: fix names for app linker script and program entry.
This fixes names of program entry and linker script files so that to
support building kernel mode apps using CMake and export package.

flat and protected mode should be the same as before.

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
2024-04-24 11:40:16 +08:00
chao an
e863e3dd37 arch/risc-v: add LLVM clang support
Verified on LLVM-Metal:
$ riscv64-unknown-elf-clang --version
(LLVM-Metal 15.9.0-2023.03.0) clang version 15.9.0
Target: riscv64-unknown-unknown-elf
Thread model: posix

Signed-off-by: chao an <anchao@lixiang.com>
2024-04-19 12:27:56 +08:00
Pressl, Štěpán
1a2e752ea7 arch/arm/src/samv7/sam_qencoder.c: add support for GETINDEX ioctl call
The SAMV7's qencoder driver now supports the GETINDEX ioctl call
which does not reset the internal Timer/Counter and returns
the current position, position of the last index and the number
of captured indexes to a struct qe_index_s pointer. Because the
SAMV7's timers are 16bit, the extension to 32 bits must be done.

Select CONFIG_SAMV7_QENCODER_ENABLE_GETINDEX in the Kconfig to
enable this functionality.

This driver does not obey the instructions given in the ATSAMV7
2023 datasheet because the recommended trigger resets the internal
counter which is not desired. Instead, a capture into capture A
and capture B registers is used. This way if an event happens
(the rising edge of the index signal), the current counter's value
is captured.

Signed-off-by: Stepan Pressl <pressste@fel.cvut.cz>
2024-04-17 19:44:34 +08:00
simbit18
b0504f1e5e fix nxstyle
fix Relative file path does not match actual file.
2024-04-15 15:33:17 -03:00
Jorge Guzman
5e3cbd1165 stm32h7/linum-stm32h753bi: Add support to littlefs and nxffs with flash mem. via quadspi
Signed-off-by: Jorge Guzman <jorge.gzm@gmail.com>
2024-04-15 13:24:55 +08:00
hujun5
f41f0324a5 qemu/trustzone: add secure memory config
According to the qemu source code, hw/arm/virt.c.
The secure memory of the ARM Virt board is [0xe000000~0xf000000]
and the non-secure memory is configured as [0x40000000~0xffffffff].
We made the following adjustments based on the above virt board configuration

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-04-14 12:07:59 -03:00
TimJTi
df7650af71 Improvements relating to SAMA5 TSD driver 2024-04-14 14:47:53 +08:00
Xiang Xiao
4ea2aeff6b arch: Remove xxx_intstack_top and xxx_intstack_alloc
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2024-04-09 16:59:00 -03:00
ligd
4e725ecd44 arch: color the intstack for all the CPUs
Signed-off-by: ligd <liguiding1@xiaomi.com>
2024-04-09 16:59:00 -03:00
ligd
3844efb5b8 stack: update up_get_intstackbase API to support cpu id
For crash dump all the CPU intstack

Signed-off-by: ligd <liguiding1@xiaomi.com>
2024-04-09 16:59:00 -03:00
simbit18
9967989b02 Fix Kconfig style
Remove spaces from Kconfig files
Remove TABs
Add comments
2024-04-09 10:49:23 +08:00
Alan Carvalho de Assis
67dbdb18e3 stm32f76xx77xx_rcc: Fix PLLI2S factor divisors
Value was set with PLLSAI factor divisors instead of
PLLI2S factor divisors.

Signed-off-by: Alan C Assis <acassis@gmail.com>
2024-04-09 10:45:13 +08:00
Jorge Guzman
f7a98db234 stm32h7/fdcan: fixed kconfig and debug register
Signed-off-by: Jorge Guzman <jorge.gzm@gmail.com>
2024-04-07 14:56:58 -03:00
Igor Mišić
510b6221ca stm32h7/stm32_i2c: fix sending large data over i2c
To trigger TC interrupt NBYTES needs to be set before RELOAD is disabled
2024-04-07 14:54:47 -03:00
W-M-R
0ede3fc377 kasan: Implementing global variable out of bounds detection
Extracting global variable information using scripts:
kasan_global.py:
1. Extract the global variable information provided by the -- param asan globals=1 option
2. Generate shadow regions for global variable out of bounds detection
Makefile:
1. Implement multiple links, embed the shadow area into the program, and call it by the Kasan module

Signed-off-by: W-M-R <mike_0528@163.com>
2024-04-07 23:31:13 +08:00
Pressl, Štěpán
bf3a5bb4cb arch/arm/src/samv7/sam_pwm.c: adjust arch driver to DCPOL options
Signed-off-by: Stepan Pressl <pressste@fel.cvut.cz>
2024-04-06 13:12:08 +08:00
Mingjie Shen
6aae7ba0eb arch/arm/src/s32k3xx: Fix incorrect check for invalid port or pin number
Signed-off-by: Mingjie Shen <shen497@purdue.edu>
2024-04-04 11:53:06 +08:00
Mingjie Shen
99109b8d79 all: Fix accessing uninitialized local variables
Prior to this commit, in elf_emit() and elf_emit_align(),
ret was uninitialized if total was 0.

Signed-off-by: Mingjie Shen <shen497@purdue.edu>
2024-04-04 11:51:54 +08:00
Mingjie Shen
f2082acfd7 arch/arm/src/am335x: Fix incorrect signedness of variable
The check `if (delta < 0)` in line 353 and 407 would always be false
if delta were unsigned.

Signed-off-by: Mingjie Shen <shen497@purdue.edu>
2024-04-04 11:50:36 +08:00
chao an
446e0280b0 arm/stm32f7: fix ci build break
1.
In file included from chip/stm32_rtc.c:31:
chip/stm32_rtc.c: In function 'rtchw_set_alrmar':
chip/stm32_rtc.c:761:11: warning: format '%x' expects argument of type 'unsigned int',
                         but argument 3 has type 'uint32_t' {aka 'volatile long unsigned int'} [-Wformat=]
  761 |   rtcinfo("  ALRMAR: %08x\n", getreg32(STM32_RTC_ALRMAR));
      |           ^~~~~~~~~~~~~~~~~~
chip/stm32_rtc.c:761:25: note: format string is defined here
  761 |   rtcinfo("  ALRMAR: %08x\n", getreg32(STM32_RTC_ALRMAR));
      |                      ~~~^
      |                         |
      |                         unsigned int
      |                      %08lx

2.

arm-none-eabi-ld: staging/libdrivers.a(userled_lower.o): in function `userled_setled':
drivers/leds/userled_lower.c💯 undefined reference to `board_userled'

Regression:
     stm32h7/linum-stm32h753bi: add support to leds

Signed-off-by: chao an <anchao@lixiang.com>
2024-04-02 15:42:32 +08:00
chao an
c7770fddfe qemu/armv7a: add Symmetric Multi-Processing (SMP) support
Bringup Co-Processor by PSCI(Power State Coordination Interface)

Signed-off-by: chao an <anchao@lixiang.com>
2024-03-28 19:30:26 +08:00
xuxin19
741de4b450 cmake:init protected-mode for CMake build
adjust link options for userspace elf
specify system libs and apps lib to only link with nuttx target in flat build mode

Signed-off-by: xuxin19 <xuxin19@xiaomi.com>
2024-03-27 23:01:08 +08:00
David Sidrane
3932cb2a3b stm32h7:Serial Fix Logic error in up_dma_txavailable 2024-03-26 20:11:49 -03:00
Anthony Merlino
d808ed450c stm32h7: Fix race condition in ADC interrupt handling 2024-03-26 01:20:48 +08:00
GC2020
8a08190394 Modify the enable logic of FDCAN (all STM32H7 series are FDCAN pins) 2024-03-25 01:36:52 +08:00
ligd
a1836de09a fdt: move fdx_xx extend APIs from boards to drivers
Signed-off-by: ligd <liguiding1@xiaomi.com>
2024-03-22 18:51:33 +08:00
Ville Juven
7a2edf9414 stm32f7/stm32_foc.c: Set .info_get to foc_lower_ops
This fixes build error (Werror):

Error: chip/stm32_foc.c:1918:12: error: 'stm32_foc_info_get' defined but not used [-Werror=unused-function]
 1918 | static int stm32_foc_info_get(struct foc_dev_s *dev, struct foc_info_s *info)
      |            ^~~~~~~~~~~~~~~~~~
cc1: all warnings being treated as errors
2024-03-21 19:53:29 +08:00
Jukka Laitinen
0dee4eb7f0 arch/arm/src/imxrt/imxrt_start.c: Clear CONTROL register at start to make sure we use MSP as the stack pointer
When entering the function from an external bootloader, the CPU could be using PSP. But the following
code expects MSP to be in use.

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2024-03-21 18:45:00 +08:00
ligd
327d0789e4 arch: add ARCH_TRUSTZONE_DISABLED choice
We can decide whether use trustzone

After this patch, we can support the following mode:

                             ARCH_HAVE_TRUSTZONE   ARCH_TRUSTZONE_DISABLED  ARCH_TRUSTZONE_SECURE  ARCH_TRUSTZONE_NONSECURE

Without Security Extensions         n                       n                       n                         n
CHIP have NO trustzone

With Security Extensions            y                       y                       n                         n
Only one bin in sec mode

With Security Extensions            y                       n                       y                         n
TEE bin in sec mode

With Security Extensions            y                       n                       n                         y
REE bin in non-sec mode

Signed-off-by: ligd <liguiding1@xiaomi.com>
2024-03-19 18:24:42 +09:00
zhangyuan21
9c0d2e1a3c armv7-a/gicv2: move IRQ to group1 and group0 as the FIQ
Purpose: make the the os crash when busyloop with interrupt disable

Follow the arm gicv2 spec, if we want to use the IRQ and FIQ
simultaneously when not using the processor Security Externsions.
We should:
1. IRQ to Group 1 and FIQ to Group 0;
2. Set CICC_CTLR.FIQEn to 1;

Then in NuttX:
1. implement the arm_decodefiq and directly crash in it;
2. provide interface to change the IRQ to FIQ, e.g. change the
   watchdog IRQ to FIQ, so the watchdog can trigger even with the
   interrupt disabled (up_irq_save() called);

Signed-off-by: wangbowen6 <wangbowen6@xiaomi.com>
Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
Signed-off-by: ligd <liguiding1@xiaomi.com>
2024-03-19 18:24:42 +09:00
Jorge Guzman
8e0bf9a0b4 stm32h7/linum-stm32h753bi: Add buzzer support
Signed-off-by: Jorge Guzman <jorge.gzm@gmail.com>
2024-03-18 13:48:59 +08:00
Michał Łyszczek
87cec8d5c7 stm32f40xxx_pinmap: add 3rd alternate mapping for USART6
Some stm32 has alternate USART6 pinout on G9/G14 but others have it
on A12/A11. Unfortunately it's very difficult to make proper ifdefs for
this since position is based on package (and pincount) and not chip
itself. Creating such list would take a lot of time. Because of that
I just added another possible config for this pin and moved responsibility
of proper selection onto board code.

Signed-off-by: Michał Łyszczek <michal.lyszczek@bofc.pl>
2024-03-12 10:09:59 -03:00
Michał Łyszczek
02dc6fa219 stm32_serial.c: fix compilation of onewire driver mode
Onewire driver wants to use "struct up_dev_s *priv", which is extracted
from "struct uart_dev_s" and "struct inode". But inode and uart dev are
only declared when TERMIOS or BSDCOMPAT is also enabled. Without these
driver fails to compile with missing declaration errors. Adding some
additional "#if defined()" to these declarations fix the issue and driver
compiles and works properly (tested with ds18b20 temp sensor).

Signed-off-by: Michał Łyszczek <michal.lyszczek@bofc.pl>
2024-03-12 13:45:41 +01:00
Nicolas Lemblé
63782c7ff2 arch/xmc4 Add tickless support 2024-03-11 13:56:07 -03:00
Pressl, Štěpán
9f7f3a6e3a SAMV7: fix typos in Kconfig PWM0 fault input selections - inv. polarity 2024-03-09 18:32:58 -03:00
raiden00pl
be1750d041 arch/nrf91: fix compilation for SPI
remove references to unsupported SPI freq and SPI4 which is not supported
2024-03-10 01:43:11 +08:00
raiden00pl
d33846046e arch/nrf{52|53|91}: fix typo
fix typo sndlock -> sndblock
2024-03-10 01:43:11 +08:00
Sammy Tran
b4b7710c63 Disable interrupt during FTFC operation 2024-03-06 13:31:48 -03:00
Yanfeng Liu
a66c7c3ee1 comments/docs: fix typos in comments
This fix some typos in comments.

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
2024-03-06 13:31:50 +08:00
trns1997
54e9e582d5 Use C++ standard lib from toolchain
Signed-off-by: trns1997 <trns1997@gmail.com>
2024-03-06 08:42:44 +08:00
ligd
113ab704c7 goldfish & qemu: handle MMU table and CONFIG_RAM_END
Reproduce:

configure:
./tools/configure.sh qemu-armv7a:nsh -j8
open kasan:
CONFIG_MM_KASAN=y
run:
qemu-system-arm -cpu cortex-a7 -nographic -machine virt,virtualization=off,gic-version=2 -net none -chardev stdio,id=con,mux=on -serial chardev:con -mon chardev=con,mode=readline -kernel ./nuttx
error:
run hanged

Rootcause:

In Qemu armv7a, the ram-end reserved for MMU PGTABLE:

And the up_allocate_heap()  directly use the ram-end for heap in arch/arm/src/common/arm_allocateheap.c

*heap_size  = CONFIG_RAM_END - g_idle_topstack;

Then they are conflict.
Usually, we won't use the heap end, so can't find the error.
BUT, the KASAN will use the heap end for shadow, so found the error.

Resolve:

up_allocate_heap() consider of MMU, re-define the RAM_END at chip.h

Signed-off-by: ligd <liguiding1@xiaomi.com>
2024-03-06 09:26:44 +09:00
raiden00pl
a20b3e8335 arch/nrf{52|53|91}/spi: fix error message
wrong parameters were passed to spierr()
2024-03-06 00:50:00 +08:00
Michal Lenc
44a087111d samv7: add support for USART TX DMA transfers
This commit adds support for TX DMA transfers for USART peripheral. Code
refactor in sam_serial.h was also required in order to have correct
defines for all possible cases (both RX and TX DMA used, just one used,
none used).

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2024-03-05 09:48:03 +08:00
Tiago Medicci Serrano
dcad39a962 arch: Fix style warnings regarding included header files
This commit fixes style warnings regarding including header files
outside the `Included Files` section.
2024-03-05 09:45:49 +08:00
Tiago Medicci Serrano
ae9ef972c0 paging: Rename existing CONFIG_PAGING to CONFIG_LEGACY_PAGING
Current `CONFIG_PAGING` refers to an experimental implementation
to enable embedded MCUs with some limited RAM space to execute
large programs from some non-random access media.

On-demand paging should be implemented for the kernel mode with
address environment implementation enabled.
2024-03-05 09:45:49 +08:00
SPRESENSE
3b3f2d97e9 arch: cxd56: Follow interface change of set_buf() operation
set_buf() operation is changed to have the argument about
format. Follow the change.
2024-03-04 20:39:44 +08:00
ligd
91f0a0f1a8 Revert "goldfish & qemu: handle MMU table and CONFIG_RAM_END"
This reverts commit 2f7b107608.

Signed-off-by: ligd <liguiding1@xiaomi.com>
2024-03-04 18:08:15 +08:00
ligd
b599fdbc0e stm32: fix compile failed
Error: chip/stm32_sdmmc.c:1911:7: error: variable 'regaddress' is used uninitialized whenever 'if' condition is false [-Werror,-Wsometimes-uninitialized]
 1911 |   if (priv->base == STM32_SDMMC1_BASE)

Signed-off-by: ligd <liguiding1@xiaomi.com>
2024-03-04 18:08:15 +08:00
ligd
2f7b107608 goldfish & qemu: handle MMU table and CONFIG_RAM_END
Signed-off-by: ligd <liguiding1@xiaomi.com>
2024-03-03 18:57:32 +08:00