Gregory Nutt
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49f3831e11
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SAMA5: Alternatie clock configuration that yields a perfect 48MHz full speed USB clock and a CPU clock of 384MHz
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2013-08-14 15:16:04 -06:00 |
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Gregory Nutt
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e32b60a78c
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SAMA5 OHCI: Use physical address and flush and/or invalidate data caches as necessary
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2013-08-14 12:23:06 -06:00 |
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Gregory Nutt
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bdbe4a4f25
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Clean up some LP17xx and STM32 USB host configuration compilation errors due to the massive changes to the USB host interfaces needed to support the SAMA5
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2013-08-13 17:43:19 -06:00 |
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Gregory Nutt
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8f429fd54d
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SAMA5: Major restructuring of the the OHCI driver drivers to better handle the multiple root hub ports and concureent transfers on each port.
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2013-08-13 16:48:14 -06:00 |
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Gregory Nutt
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34418d12bb
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Separate wait() and enumerate() methods from struct usbhost_driver_s and move to new interface, struct usbhost_connection_s. This is part of the necessary restructuring of the USB host interface to support multiple root hub ports.
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2013-08-13 15:03:46 -06:00 |
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Gregory Nutt
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b4645f73ec
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Back out most of the changes of 3b04d08043742b9e65cf38d45988b35bff91daed
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2013-08-13 14:12:27 -06:00 |
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Gregory Nutt
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d0fbea35eb
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Separate SAMA5 OHCI interrupt handling into separate functions
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2013-08-13 13:34:35 -06:00 |
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Gregory Nutt
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7339c1c5e6
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SAMA5 OHCI: Fix some erors in the loop that waits for device connection changes
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2013-08-13 09:44:16 -06:00 |
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Gregory Nutt
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6d72cccdf0
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Fix re-entry problem in SAMA5 up_putc
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2013-08-13 09:42:40 -06:00 |
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Gregory Nutt
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f3bfd6a515
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STM32 F3 fixes from John Wharington
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2013-08-13 07:48:18 -06:00 |
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Gregory Nutt
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a4c195482f
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More changes to USB host interface to support multiple downstream ports
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2013-08-12 16:29:33 -06:00 |
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Gregory Nutt
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39696cbf96
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First of several changes needed to support multiple USB host root hubs
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2013-08-12 14:44:06 -06:00 |
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Gregory Nutt
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f5a0ce709c
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SAMA5: Add logic to control VBUS power for OHCI
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2013-08-12 11:59:10 -06:00 |
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Gregory Nutt
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dfe6452b8e
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Add untested OHCI driver for the SAMA5; structure naming and header files for USB host initialization prototypes
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2013-08-11 17:11:32 -06:00 |
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Gregory Nutt
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9cf1365cde
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SAMA5: Some improvements to the HSCMI card removal/insertion logic
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2013-08-11 11:13:11 -06:00 |
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Gregory Nutt
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69bc6afbd3
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Add CAN configuration to STM32 config menu
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2013-08-10 19:37:35 -06:00 |
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Gregory Nutt
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03130ca5a3
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STM32: Fix STM32 serial init for non-reordered serial ports. From Lorenz Meier
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2013-08-10 19:33:16 -06:00 |
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Gregory Nutt
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217ed87aad
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Added option to disable STM32 serial port re-ordering
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2013-08-10 19:29:44 -06:00 |
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Gregory Nutt
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3c38992727
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SAMA5: Fix HSMCI race condition. Now memory card interface is functional with DMA
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2013-08-10 18:01:23 -06:00 |
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Gregory Nutt
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6622714c5d
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Rearrange configuration settings so that ARCH_HAVE_SDIO is moved to higher, sharable level
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2013-08-10 09:06:53 -06:00 |
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Gregory Nutt
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75d0fc2a10
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Extend the virtual-to-physical address conversion logic to handle NFS SRM, UDPH SRAM, and external SRAM and PSRAM.
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2013-08-09 17:55:27 -06:00 |
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Gregory Nutt
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d8b3921972
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SAMA5: Centralize logic for conversion between physical and virtual addresses
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2013-08-09 17:25:53 -06:00 |
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Gregory Nutt
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ad6b8726c2
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Fix some cache-related issues with the SAMA5 DMA driver
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2013-08-09 15:25:13 -06:00 |
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Gregory Nutt
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a2ba8992a9
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SAM3,4,A5 DMA fixes; SAMA5 SPI driver now supports DMA transfers
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2013-08-09 13:12:16 -06:00 |
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Gregory Nutt
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2b36e7e266
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SAMA5: Use RDR/TDR registers for DMA, not FIFO registers; change DMA bit settings to match Atmel example. Still no DMA
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2013-08-08 15:51:16 -06:00 |
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Gregory Nutt
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53c4a1e647
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SAMA5 DMA: Need to flush caches; DMA channel depends upon direction of DMA; the maximum transfer size in bytes depends on the number of bytes per transfer
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2013-08-08 13:15:52 -06:00 |
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Gregory Nutt
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05242e41ef
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More SAMA5 DMAC driver fixes. Still does not work.
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2013-08-07 17:19:48 -06:00 |
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Gregory Nutt
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e015c6edd6
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SAMA3,4,A5: Misc corrections to DMA and HSMCI drivers
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2013-08-07 11:32:08 -06:00 |
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Gregory Nutt
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159635bc2a
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Fix SAM bug: Parmaters reversed in DMA function call
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2013-08-06 15:47:09 -06:00 |
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Gregory Nutt
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d1da100cf0
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SAM3,4,A5 DMAC driver fixes
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2013-08-06 13:27:48 -06:00 |
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Gregory Nutt
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03f24c7a1d
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SAM3,4,A5: Fix some masked status checks that can generate false error reports
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2013-08-06 12:36:56 -06:00 |
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Gregory Nutt
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dfe42d0254
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SAMA5: A few early, easy bug fixes. The rest will all be difficult
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2013-08-06 11:29:53 -06:00 |
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Gregory Nutt
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e8a34ea3ac
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SAMA5: Add PIO interrupt support. Massive name changes for consistency in PIO vs GPIO naming. SAMA5D3x-EK: Add support for SD card detection PIO interrupts
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2013-08-06 10:20:17 -06:00 |
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Gregory Nutt
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a68a3a0366
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SAMA5: Add HSMCI memory card driver support
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2013-08-05 16:21:24 -06:00 |
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Gregory Nutt
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cff3e713f1
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SAMA5: SPI Driver + AT25 FLASH work; SAM3/4: Correct an error, SPI will not be correctly configured if CONFIG_SPI_OWNBUS=n
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2013-08-05 10:29:43 -06:00 |
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Gregory Nutt
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36f4cb53dd
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SAMA5: Add logic to auto-mount a file system on AT25 SPI FLASH for NSH
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2013-08-05 08:24:39 -06:00 |
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Gregory Nutt
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412aaa83a2
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SAMA5D3x-EK: At support for the AT25 serial FLASH
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2013-08-04 16:56:41 -06:00 |
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Gregory Nutt
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5fe6e4df26
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SAMA5: Add register level debug option for SPI
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2013-08-04 14:45:24 -06:00 |
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Gregory Nutt
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d516baa73f
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SAMA5: SPI driver now supports both SPI0 and SPI1
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2013-08-04 12:50:20 -06:00 |
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Gregory Nutt
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487866b2b6
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SAMA5: Add basic SPI suppport (untested)
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2013-08-04 11:08:20 -06:00 |
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Gregory Nutt
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8194e6bbcf
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SAMA5: Add DMA suppport (untested)
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2013-08-04 10:44:18 -06:00 |
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Gregory Nutt
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a93b095ce4
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SAMA5: Add DMA controller register definitions
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2013-08-03 12:13:42 -06:00 |
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Gregory Nutt
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8b317e9ea3
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Standard configuration variables used to enable interupt controller debug; SAMA5: Correct handling of spurious interrupts
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2013-08-03 08:22:37 -06:00 |
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Gregory Nutt
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c7293535fe
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Various changes to get SAMA5 SDRAM working. Marginally functional, but there is more to be done
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2013-08-02 18:30:27 -06:00 |
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Gregory Nutt
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08a1ff5c79
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Correct some typos int he MPADDRCS register address definitions
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2013-08-02 12:06:11 -06:00 |
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Gregory Nutt
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b00d72a7f2
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SAMA5: More MMU-related changes to properly initialize SDRAM
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2013-08-02 11:11:57 -06:00 |
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Gregory Nutt
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894618f894
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SAMA5: Add logic to initialize SAMA5D3x-EK on-board SDRAM
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2013-08-01 16:58:55 -06:00 |
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Gregory Nutt
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70e1028d41
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SAMA5: Add DDR controller register definitions
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2013-08-01 12:27:41 -06:00 |
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Gregory Nutt
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35c3a49e1c
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ARMv7-A: Map all of .text, .bss, .data., stacks before enabling the MMU and caching. This is simpler and avoids fears I have about caching
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2013-08-01 10:05:33 -06:00 |
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Gregory Nutt
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f0e6d4f101
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ARMv7-A: Separate CONFIG_PAGING start-up logic into a different startup file. Too much conditional compilation.
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2013-08-01 07:41:00 -06:00 |
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