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Author SHA1 Message Date
Xiang Xiao
54e630e14d arch: Merge up_arch.h into up_internal.h 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-03-14 09:32:17 +02:00
Xiang Xiao
e800f54bfd arch/mpfs: Don't include nuttx header file in mpfs_opensbi.c 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-03-14 09:32:17 +02:00
chao.an
4e08b1df93 drviers/syslog: correct the return value of default channel write 
Signed-off-by: chao.an <anchao@xiaomi.com>
 2022-03-14 08:59:34 +02:00
Abdelatif Guettouche
cff3d9df7b arch/xtensa: Fix some indentations. 2022-03-14 11:12:35 +08:00
Abdelatif Guettouche
6fa4a42e34 xtensa/: Save A3 as part of the regular context saving. 
It was separate because the syscal handler was using it before calling
_xtensa_context_save.  The order of operations has now changed and we
can save A3 with the rest of the context.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-03-14 11:12:35 +08:00
Abdelatif Guettouche
4d1bb20f8c xtensa_user_handler.S: In syscall handler store context before 
continuing the rest of the syscall handling.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-03-14 11:12:35 +08:00
Abdelatif Guettouche
5305f76b1d xtensa_context.S: Use Zephyr's version of spilling the window register 
file.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-03-14 11:12:35 +08:00
Abdelatif Guettouche
2445de173d xtensa_dumpstate.c: Don't dump temporary registers. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-03-14 11:12:35 +08:00
Abdelatif Guettouche
4786963ee2 xtensa_context.S: No need to save A2 before calling 
_xtensa_save_context.  It uses CALL0, in this case A1 is callee saved
and we can it directly.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-03-14 11:12:35 +08:00
Abdelatif Guettouche
2dcbf28f15 xtensa_context.S: A1 should be restored by the caller not 
xtensa_context_resotred. Here it was being restored twice.
Remove the one in xtensa_context_restore.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-03-14 11:12:35 +08:00
Abdelatif Guettouche
5bd2e97a27 xtensa_context.S: Fix the type of _xtensa_context_restore. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-03-14 11:12:35 +08:00
Abdelatif Guettouche
e9018b29bf xtensa_context.S: Remove the CALL0 ABI version of xtensa_context_switch 
as it's the same as the Window ABI now.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-03-14 11:12:35 +08:00
Huang Qi
7d58e6263f drivers/note: Add macro guard for instrumention switch 
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
 2022-03-14 10:52:48 +08:00
Xiang Xiao
c96c96a399 drivers: Merge the common driver initialization into one place 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-03-13 11:24:48 -03:00
Xiang Xiao
ea614090cd arch/risc-v: Change hex number to low case in csr.h 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-03-13 10:17:25 +02:00
Xiang Xiao
f94093bc2e arch/ceva: Move the idle stack initialization to up_initial_state 
to follow other arch's implementation

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-03-13 00:28:05 +02:00
Xiang Xiao
4cc28882f9 sched/init: Don't call sq_init/dq_init on global link list 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-03-12 15:06:39 -03:00
Xiang Xiao
ab872b0199 sched/init: Move binfmt_initialize before hardware initialization 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-03-12 15:06:39 -03:00
Xiang Xiao
2ce62bb583 sched/irq: Remove the code which zero out g_irqvector fields 
since the boot up code already do it

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-03-12 15:06:39 -03:00
Xiang Xiao
d9a442a859 mm/iob: Remove initialized static variable inside iob_initialize 
since it's impossible to call iob_initialize twice

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-03-12 15:06:39 -03:00
Xiang Xiao
b0786606fc sched/wdog: Remove wd_initialize which isn't really used anymore 
since g_wdactivelist is already set to zero by the boot code

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-03-12 15:06:39 -03:00
Xiang Xiao
cf2538c277 mm/shm: Initialize shm_info_s at the definition place 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-03-12 15:06:39 -03:00
Xiang Xiao
dfb9a763a7 fs: Initialize g_inode_sem at the definition place 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-03-12 15:06:39 -03:00
Xiang Xiao
8b7d08f59a net: Reoder the initialize sequence(mac->ip->tcp/udp) 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-03-12 19:24:17 +02:00
Xiang Xiao
7598070508 net: Remove the unnecessary initialization code 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-03-12 19:24:17 +02:00
Xiang Xiao
4d0fcc2526 net/igmp: Remove igmp_initialize 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-03-12 19:24:17 +02:00
Xiang Xiao
19ec0b4fe3 net/route: Remove net_init_fileroute 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-03-12 19:24:17 +02:00
Xiang Xiao
7028531e74 net/tcp: Remove tcp_listen_initialize 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-03-12 19:24:17 +02:00
Xiang Xiao
716e27cbeb net/local: Remove local_initialize 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-03-12 19:24:17 +02:00
Xiang Xiao
9c1fc8da4e net: Remove net_lockinitialize 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-03-12 19:24:17 +02:00
Xiang Xiao
1a7f49eeb3 arch/z[80|16]: Move up_getsp declaration to arch.h 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-03-12 19:21:59 +02:00
Petro Karashchenko
e8213b9ae5 tools: define BOARD_COMMON_DIR only if ARCH_BOARD_COMMON is set 
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
 2022-03-12 22:12:44 +08:00
Gustavo Henrique Nihei
d7364a6506 esp32s3-devkit: Enable RT-Timer on board bringup 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-03-12 15:27:30 +02:00
Gustavo Henrique Nihei
7ede285cfe xtensa/esp32s3: Add support for RT-Timer based on Systimer peripheral 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-03-12 15:27:30 +02:00
Gustavo Henrique Nihei
86b18bd6e9 xtensa/esp32s3: Move code documentation to the correct place 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-03-12 11:53:14 +08:00
Gustavo Henrique Nihei
a4db4031c9 xtensa/esp32s3: Stall Systimer when core 1 is temporarily stalled 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-03-12 11:53:14 +08:00
Masayuki Ishikawa
023b1a5260 boards: sabre-6quad: Add CONFIG_DEBUG_FULLOPT=y to knsh/defconfig 
Summary:
- I noticed that undefined instruction happens with getprime and gcc-10.3.1
- Actually, the issue does not happen with gcc-9.3.1
- This is a tentative solution to avoid the issue

Impact:
- sabre-6quad:knsh only

Testing:
- Tested with hello/getprime

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
 2022-03-12 11:49:53 +08:00
Xiang Xiao
39fb09738d arch: Move [arm|xtensa]_intstack_[alloc|top] to common header file 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-03-11 23:08:07 +02:00
Xiang Xiao
17d1a48fc9 arch: Remove up_puts prototype from up_inernal.h 
since it's defined in include/nuttx/arch.h now

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-03-11 23:08:07 +02:00
Xiang Xiao
90c01bde28 drivers: Move the common driver to misc folder 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-03-12 02:48:21 +08:00
Jukka Laitinen
d9607f71d2 Revert "arch/risc-v: Correct FPU register save area in riscv_copystate" 
This reverts commit 86358bff3bc814efb564a4427b4bcd6c3c91dbf0.
 2022-03-11 23:43:41 +08:00
Petro Karashchenko
dab5bb6bd3 boards/Kconfig: introduce ARCH_BOARD_COMMON option 
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
 2022-03-11 16:00:00 +08:00
Petro Karashchenko
a958e7f58e boards/arm/samv7: rework linker script usage logic to allow custom linker scripts 
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
 2022-03-11 11:25:50 +08:00
Petro Karashchenko
fc9e2d272e arch/arm/arm[-a|-r]: fix typos in comments 
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
 2022-03-11 11:08:01 +08:00
Gustavo Henrique Nihei
c8796c1bc2 xtensa/esp32s3: Move SPI RAM configuration out of Peripheral menu 
Menu for configuration of SPI RAM was wrongly placed inside the menu
for peripheral selection.

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-03-11 11:05:24 +08:00
Abdelatif Guettouche
f0a5777a26 xtensa_swint.c: Restore the coprocessor state at the end for consistency. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-03-11 02:23:09 +02:00
Abdelatif Guettouche
7c57739d1d xtensa_exit.c: Co-processor state is restored as part of the 
SYS_Restore_context call, no need to call it separately.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-03-11 02:23:09 +02:00
Abdelatif Guettouche
71ba4a6b76 arch/xtensa: Use the software interrupt when saving context too. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-03-11 02:23:09 +02:00
Abdelatif Guettouche
329db99e51 arch/xtensa: Use rsync around manipulating interrupt registers and 
replace `isync` by `rsync` in other places.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-03-11 02:23:09 +02:00
Jukka Laitinen
81a19c1ce8 arch/riscv/src/mpfs: Make cleaner pinmux configurations for USB 
Mux USB IO pins one-by-one using package specific pinmux definitions. This avoids accidentally overwriting IO settings for other pins.

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
 2022-03-11 00:22:43 +02:00