There is currently a big problem in the address environment handling which
is that the address environment is released too soon when the process is
exiting. The current MMU mappings will always be the exiting process's, which means
the system needs them AT LEAST until the next context switch happens. If
the next thread is a kernel thread, the address environment is needed for
longer.
Kernel threads "lend" the address environment of the previous user process.
This is beneficial in two ways:
- The kernel processes do not need an allocated address environment
- When a context switch happens from user -> kernel or kernel -> kernel,
the TLB does not need to be flushed. This must be done only when
changing to a different user address environment.
Another issue is when a new process is created; the address environment
of the new process must be temporarily instantiated by up_addrenv_select().
However, the system scheduler does not know that the process has a different
address environment to its own and when / if a context restore happens, the
wrong MMU page directory is restored and the process will either crash or
do something horribly wrong.
The following changes are needed to fix the issues:
- Add mm_curr which is the current address environment of the process
- Add a reference counter to safeguard the address environment
- Whenever an address environment is mapped to MMU, its reference counter
is incremented
- Whenever and address environment is unmapped from MMU, its reference
counter is decremented, and tested. If no more references -> drop the
address environment and release the memory as well
- To limit the context switch delay, the address environment is freed in
a separate low priority clean-up thread (LPWORK)
- When a process temporarily instantiates another process's address
environment, the scheduler will now know of this and will restore the
correct mappings to MMU
Why is this not causing more noticeable issues ? The problem only happens
under the aforementioned special conditions, and if a context switch or
IRQ occurs during this time.
- Adds support for the Starcat Jupiter Nano
SAMA5D27C-LD1G board
- https://github.com/starcat-io/jupiter-nano
- this board is very similar to the Microchip/Atmel
SAMA5D2-Xplained board (sama5d2-xult)
- in NuttX 11.x and 12.x the nuttx entry point
for the sama5d2-xult board changed to 0x20008E20
(from 0x2008040).
This change updates defconfigs and the README.txt
to reflect that.
- no code changes
SAMA5D2 and SAMA5D4 does not support external reset.
Some SAMA5 board's Kconfig contain item SAMA5_SYSTEMRESET, but it is better in arch/arm/src/Kconfig.
since the code could map the unsupported work to the
supported one and remove select SCHED_WORKQUEUE from
Kconfig since SCHED_[L|H]PWORK already do the selection
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Follow: http://glennastory.net/boot/sysinit.html
This is first script that init runs is rc.sysinit. This
script does serval initialization tasks about basic service.
The boot sequence currently provided to the board level is:
board_earlyinitialize->
board_lateinitialize(Peripherals driver, core driver, ...)->
run rcS script(mount fs, run service) ->
board_appinitialize->
After this patch:
The boot sequence currently provided to the board level is:
board_earlyinitialize->
board_lateinitialize(core driver,...)->
run rc.sysinit script(mount fs, run core service) ->
board_appinitialize(Peripherals driver)->
run rcS script(run other service)->
So, Peripheral drivers can do more with the file system and
core services.
Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
## Summary
A lot of linker scripts were listed twice, once for unix, once for windows.
This PR cleans up the logic so they're only listed once.
## Impact
Any opportunity to use a single source of truth and reduce lines of code is a win!
## Testing
CI will test all build
since the related code was removed by:
commit 4d5a964f29
Author: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
Date: Tue Feb 23 18:04:13 2021 +0800
net: unify socket into file descriptor
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
