Commit Graph

264 Commits

Author SHA1 Message Date
cuiziwei
7b43a9413a arch/EXTRA_LIBS: link all staging library.
Signed-off-by: cuiziwei <cuiziwei@xiaomi.com>
2024-08-21 01:40:15 +08:00
xuxin19
9fdd299d32 cmake:split the archive process to avoid parameter problems
refer to:https://cmake.org/cmake/help/latest/variable/CMAKE_LANG_ARCHIVE_APPEND.html

this will solve the problem of too long parameters
when executing ar in cygwin environment such as msys.

Signed-off-by: xuxin19 <xuxin19@xiaomi.com>
2024-08-18 23:26:01 +08:00
chenxiaoyi
7ce5241f0e types.h: fix windows build error
Windows Kits\10\Include\10.0.22621.0\ucrt\corecrt.h(605,39): error C2371: 'wint_t': redefinition; different basic types
Windows Kits\10\Include\10.0.22621.0\ucrt\corecrt.h(606,39): error C2371: 'wctype_t': redefinition; different basic types

Co-authored-by: chenxiaoyi <chenxiaoyi@xiaomi.com>
Co-authored-by: xuxin19 <xuxin19@xiaomi.com>
2024-08-14 22:36:57 +08:00
yanghuatao
fecc5091af toolchain/ghs: Fix SP_DSB warnings
"/mnt/yang/qixinwei_vela_warnings/nuttx/include/nuttx/spinlock.h", line 252: warning #76-D:
          argument to macro is empty
        SP_DSB();
               ^

"/mnt/yang/qixinwei_vela_warnings/nuttx/include/nuttx/spinlock.h", line 261: warning #76-D:
          argument to macro is empty
    SP_DMB();
           ^

"/mnt/yang/qixinwei_vela_warnings/nuttx/include/nuttx/spinlock.h", line 252: warning #76-D:
          argument to macro is empty
        SP_DSB();
               ^

"/mnt/yang/qixinwei_vela_warnings/nuttx/include/nuttx/spinlock.h", line 261: warning #76-D:
          argument to macro is empty
    SP_DMB();
           ^

"/mnt/yang/qixinwei_vela_warnings/nuttx/include/nuttx/spinlock.h", line 296: warning #76-D:
          argument to macro is empty
        SP_DSB();
               ^

Signed-off-by: yanghuatao <yanghuatao@xiaomi.com>
2024-08-11 14:28:12 -03:00
chao an
4ef3eeb305 arch/x86_64: fix build break if disable CONFIG_SPINLOCK
Create version.h
chip/intel64_irq.c:78:34: error: conflicting type qualifiers for ‘g_irq_spin’
   78 | static spinlock_t                g_irq_spin;
      |                                  ^~~~~~~~~~
In file included from chip/intel64_irq.c:40:
include/nuttx/spinlock.h:168:28: note: previous declaration of ‘g_irq_spin’ with type ‘spinlock_t’ {aka ‘volatile unsigned char’}
  168 | extern volatile spinlock_t g_irq_spin;
      |                            ^~~~~~~~~~
chip/intel64_cpu.c: In function ‘x86_64_cpu_ready_set’:
chip/intel64_cpu.c:314:3: warning: implicit declaration of function ‘spin_lock’ [-Wimplicit-function-declaration]
  314 |   spin_lock(&g_ap_boot);
      |   ^~~~~~~~~
chip/intel64_cpu.c:322:3: warning: implicit declaration of function ‘spin_unlock’; did you mean ‘sched_unlock’? [-Wimplicit-function-declaration]
  322 |   spin_unlock(&g_ap_boot);
      |   ^~~~~~~~~~~

Signed-off-by: chao an <anchao@lixiang.com>
2024-08-05 16:20:47 +08:00
p-szafonimateusz
3c05da536a arch/intel64: add support for HPET as system clock
HPET can be used as system clock for x86_64

to set HPET as system clock you have to enable:
  CONFIG_ONESHOT=y
  CONFIG_ALARM_ARCH=y
  CONFIG_INTEL64_ONESHOT=y
  CONFIG_ARCH_INTEL64_HPET_ALARM=y

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-08-01 17:49:41 +08:00
p-szafonimateusz
07c1f5db92 arch/intel64/irq.h: rename rdtsc macros
rename _rdtsc macro to rdtsc to avoid conflict with external code
rename rdtsc macro to rdtscp to be the same as asm instruction used

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-07-30 21:53:08 +08:00
p-szafonimateusz
90e47bf1f5 arch/x86_64/src/intel64/intel64_cpu.c: remove workaround for spin_lock
remove workaround for spin_lock which is no longer needed after inline splinlock change
2024-07-30 21:40:53 +08:00
hujun5
a4fece3450 spin_lock: inline spin_lock
test:
We can use qemu for testing.
compiling
make distclean -j20; ./tools/configure.sh -l qemu-armv8a:nsh_smp ;make -j20
running
qemu-system-aarch64 -cpu cortex-a53 -smp 4 -nographic -machine virt,virtualization=on,gic-version=3 -net none -chardev stdio,id=con,mux=on -serial chardev:con -mon chardev=con,mode=readline -kernel ./nuttx
2024-07-15 02:29:30 +08:00
p-szafonimateusz
8682321d0c arch/x86_64: addrenv support
Add addrenv support for x86_64.
For now we support mapping on PT level, so PD, PDT and PML4 are static

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-07-03 17:40:53 +08:00
p-szafonimateusz
0200a48f72 arch/intel64/intel64_map_region.c: use MMU api to implement up_map_region
use new MMU api to implement up_map_region().

The new implementation support maping over 0xffffffff but requires CONFIG_MM_PGALLOC=y

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-07-03 17:40:53 +08:00
p-szafonimateusz
b1f3435d22 arch/intel64: add support for MM_PGALLOC
add support for MM_PGALLOC for x86_64

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-07-03 17:40:53 +08:00
p-szafonimateusz
e0183927b4 arch/x86_64: add MMU interface
add MMU api for x86_64

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-07-03 17:40:53 +08:00
p-szafonimateusz
53d112fa95 x86_64: add ELF support
add arch_elf64.c for x86_64, ported from sim/x86

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-07-03 17:40:53 +08:00
p-szafonimateusz
bd73a915bd arch/x86_64: add support for FMA, AVX-2 and AVX-512
add support for FMA, AVX-2 and AVX-512 instruction sets for x86_64

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-07-01 13:27:33 +08:00
p-szafonimateusz
2192d83200 arch/x86_64: add support for XSAVE/XRSTOR
Add support for XSAVE/XRSTOR to handle x86_64 procesor extended states.
Support for these instructions is required to support AVX instruction set

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-07-01 13:27:33 +08:00
p-szafonimateusz
66516918ce x86_64/irq.h: use 32bit operations in up_cpu_index()
Use 32bit operations for id field in intel64_cpu_s which is int type.

This fixes an error that appears when enabling some debug options:
  `Error: operand size mismatch for `movq'``

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-06-30 21:40:50 +08:00
xuxingliang
c6d712df0e sched: move nxsched_dumponexit() to task_exithook
So the tcb->group still exists to dump files.

Signed-off-by: xuxingliang <xuxingliang@xiaomi.com>
2024-06-30 17:30:42 +08:00
p-szafonimateusz
8220b169f3 arch/intel64: add SMP support
modified various intel64 files to support SMP

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-06-29 22:37:48 +08:00
p-szafonimateusz
8d4681a190 arch/intel64: add support for AP cores boot
Intel64 can now boot application cores which is needed for SMP

IMPORTANT: CONFIG_BOARD_LOOPSPERMSEC must be properly configured,
otherwise AP boot sequence can fail due too short delays during the AP startup

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-06-29 22:37:48 +08:00
p-szafonimateusz
961ade88fe arch/intel64: add support for inter-processor signaling
Add support for inter-processor signaling in x86_64 based on up_trigger_irq() interface.
Preparations for SMP.

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-06-29 12:57:37 +08:00
p-szafonimateusz
c6170286ca arch/intel64: add cpu specific data and per-cpu interrupt stacks
Use GS base regsiter to store reference to CPU private data.
Then we can easily refer to private CPU data using the GS segment.

Required for SMP support.

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-06-28 09:40:32 -03:00
p-szafonimateusz
97726d9747 arch/x86_64/intel64/intel64_rtc.c: fix compilation
fix missing reference to comm_region->tsc_khz and
fix 'defined but not used' warnings in arch/x86_64/intel64_rtc.c

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-06-28 09:47:46 +02:00
p-szafonimateusz
09146beee9 x86_64: hide --whole-archive behind Kconfig option
Hide --whole-archive behind Kconfig option for x86.
This option is not needed and breaks ELF modules build.

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-06-28 02:31:53 +08:00
p-szafonimateusz
7afee44c22 arch/x86_64: addrenv should add offset only for RAM region
addrenv should add LOAD offset only for RAM region, the rest of memory is maped 1:1

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-06-28 02:31:09 +08:00
p-szafonimateusz
c5d1eaae72 arch/intel64: get TSC frequency only when not provided from Kconfig
on ACRN hypervisor obtaining frequency from CPUID seems to be broken,
so we have to specify this value from Kconfig.

If frequency autodetection is enabled but the returned data are
incorrect - crash early.

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-06-27 11:49:50 -03:00
xuxin19
275ec7102c cmake:bugfix CMake compilation options settings should not use strings
when repeatedly enabling and disabling string-controlled configurations,
the generated toolchain configuration may be incorrect.

Signed-off-by: xuxin19 <xuxin19@xiaomi.com>
2024-05-30 10:02:10 -03:00
Philippe Leduc
3dc6b4c9bd Add basic support for locales in order to C++ streams to build and work for simple cases (POSIX / C locale).
Fix build with C++ GCC toolchain
2024-04-29 17:34:10 +08:00
p-szafonimateusz
9a6fa489d8 x86_64_acpi.c: avoid debug messages in acpi_init()
acpi_init() must be called early during boot, some system components may be
unavailable at this stage, so debug messages won't work

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-04-24 12:55:58 -03:00
p-szafonimateusz
37a6806bb4 x86_64_acpi.c: cosmetic changes
cosmetic changes after review

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
Co-authored-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2024-04-24 12:04:08 +08:00
p-szafonimateusz
d484e85bb9 x86_64_acpi.c: make sure that RSDP is mapped
rsdp memory may be not mapped when provided from multiboot2 header.
For some reason the previous code worked on some machines.

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-04-23 11:29:21 +02:00
p-szafonimateusz
530f5cd324 arch/intel64: add cache support
Add dcache and icache support for intel64

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-04-22 23:13:44 +02:00
p-szafonimateusz
30226901c0 arch/x86_64: add simple ACPI parser
add simple ACPI parser for intel64.

For now RSDP signature can be found in BIOS legacy region or can be provided by multiboot2

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-04-22 23:47:09 +08:00
p-szafonimateusz
0aac7d929d intel64/arch.h: fix ist_t structure, there is no reserved5 field
Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-04-22 23:46:10 +08:00
p-szafonimateusz
8b09118350 intel64/intel64_handlers.c: cosmetic changes
Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-04-22 23:46:10 +08:00
p-szafonimateusz
71987be7ef intel64: add header for intel64_lowsetup
Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-04-22 23:46:10 +08:00
p-szafonimateusz
f8ec274749 intel64/intel64_irq.c: cosmetic change
Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-04-22 23:46:10 +08:00
ligd
3844efb5b8 stack: update up_get_intstackbase API to support cpu id
For crash dump all the CPU intstack

Signed-off-by: ligd <liguiding1@xiaomi.com>
2024-04-09 16:59:00 -03:00
simbit18
9967989b02 Fix Kconfig style
Remove spaces from Kconfig files
Remove TABs
Add comments
2024-04-09 10:49:23 +08:00
xuxin19
2c9d46f176 cmake:enable libxx for CMake build
distinguish whether to add the CXX header file search path
according to the target Language.

Signed-off-by: xuxin19 <xuxin19@xiaomi.com>
2024-03-15 01:28:53 +08:00
p-szafonimateusz
768c5a28a1 arch/x86_64: move common Make.defs to common
cosmetic change to simplify intel64 Make.defs

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-03-12 08:30:37 -03:00
p-szafonimateusz
0fe777abd4 arch/intel64: move timer frequency configuration to common files
this logic can be common for intel64 chips

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-03-09 11:52:29 +08:00
p-szafonimateusz
636b2309e4 arch/intel64: cosmetic changes for TSC
cosmetic changes for TSC:
- remove unused variables
- add g_ prefix to global variables

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-03-09 11:52:29 +08:00
p-szafonimateusz
0a24f60e1b arch/intel64: select the system clock source with choice option
this will make it easier to add other sources as system clock

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-03-09 11:52:29 +08:00
p-szafonimateusz
b1fd3da0f6 intel64/intel64_irq.c: support interrupts up to 255
From now all intel64 interrupts are supported.
Required step towards MSI/MSI-X

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-03-08 20:18:39 -03:00
p-szafonimateusz
2d3c9e00ab intel64/intel64_irq.c: check if IRQ is busy before using
check if interrupt is busy when IRQCHAIN is disabled

this allows user to catch configuration errors and fail early when the
already busy vector is reused

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-03-08 20:18:39 -03:00
p-szafonimateusz
53aef8e93d arch/x86_64: add SSE instruction support
at default x86_64 supports SSE, SSE2, this commit adds support for
SSE3, SSSE3, SSE41, SSE42 and SSE4A

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-03-08 08:51:20 +08:00
p-szafonimateusz
8fe76e1271 x86_64/x86_64_initialzie.c: remove up_calibratedelay
This function is not used anywhere.
For udelay calibration we have the calib_udelay app

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-03-08 08:50:35 +08:00
p-szafonimateusz
83abf9bd27 arch/x86_64: add addrenv support
this commit adds simple addrenv support for x86_64

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-03-08 08:50:35 +08:00
p-szafonimateusz
7d95bec148 qemu-intel64: move PCI initialization back to board logic
this partly revert 4123615621 which works OK for PCI serial and network cards
but breaks QEMU EDU due to usage of sem and usleep in IDLE thread context.
Another solution will be provided later.

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-03-07 15:03:40 -03:00