Commit Graph

1056 Commits

Author SHA1 Message Date
Huang Qi
32a21a1b67 UBSan: Allow custom the sanitizer in Kconfig
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-09-02 19:07:09 +08:00
wangbowen6
b15d38246c up_nputs: fix AddressSanitizer: global-buffer-overflow problem
==2117790==ERROR: AddressSanitizer: global-buffer-overflow on address 0x64d9e3c0 at pc 0x59ac4e16 bp 0xcefe8058 sp 0xcefe8048
READ of size 1 at 0x64d9e3c0 thread T0
    #0 0x59ac4e15 in up_nputs sim/up_nputs.c:54
    #1 0x59a67e4c in syslog_default_write syslog/syslog_channel.c:220
    #2 0x59a67823 in syslog_default_write syslog/syslog_write.c:101
    #3 0x59a67f10 in syslog_write syslog/syslog_write.c:153
    #4 0x59a651c3 in syslogstream_flush syslog/syslog_stream.c:60
    #5 0x59a6564e in syslogstream_addchar syslog/syslog_stream.c:104
    #6 0x59a6576f in syslogstream_putc syslog/syslog_stream.c:140
    #7 0x5989fc4d in vsprintf_internal stdio/lib_libvsprintf.c:952
    #8 0x598a1298 in lib_vsprintf stdio/lib_libvsprintf.c:1379
    #9 0x59a64ea4 in nx_vsyslog syslog/vsyslog.c:223
    #10 0x598a601a in vsyslog syslog/lib_syslog.c:68
    #11 0x59b0e3dc in AIOTJS::logPrintf(int, char const*, ...) src/ajs_log.cpp:45
    #12 0x59b03d56 in jse_dump_obj src/jse/quickjs/jse_quickjs.cpp:569
    #13 0x59b03ea1 in jse_dump_error1(JSContext*, unsigned long long) src/jse/quickjs/jse_quickjs.cpp:602
    #14 0x59b03dd9 in jse_dump_error(JSContext*) src/jse/quickjs/jse_quickjs.cpp:591
    #15 0x59bed615 in ferry::DomComponent::callHook(char const*) src/framework/dom/component.cpp:65
    #16 0x59bfe0ff in ferry::DomComponent::initialize() src/framework/dom/component.cpp:645
    #17 0x59bb141d in dom_create_component(JSContext*, unsigned long long, unsigned long long, unsigned long long) (/home/wangbowen/project/central/vela_miot_bes_m0/bin/audio+0x365c41d)
    #18 0x59b4c0d3 in AIOTJS::__createComponent(JSContext*, unsigned long long, int, unsigned long long*) (/home/wangbowen/project/central/vela_miot_bes_m0/bin/audio+0x35f70d3)
    #19 0x5a56ec17 in js_call_c_function quickjs/quickjs.c:16108

Signed-off-by: wangbowen6 <wangbowen6@xiaomi.com>
2022-09-01 11:51:48 +08:00
Masayuki Ishikawa
b7063427c8 arch: risc-v: Fix up_check_tcbstack() for CONFIG_ARCH_ADDRENV=y
Summary:
- I noticed that ps shows incorrect stack usage when running
  getprime in the background.
- With CONFIG_ARCH_ADDRENV=y, a user task including pthread
  allocates its stack in the user space that needs to be
  accessed with a correct address environment.
- This commit fixes this issue.

Impact:
- CONFIG_ARCH_ADDRENV=y only

Testing:
- Tested with rv-virt:knsh64 on qemu-6.2

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-08-31 09:20:36 +08:00
Masayuki Ishikawa
e2f0f431d9 arch: risc-v: Assign dedicated virtual addresses for text and heap
Summary:
- Current RISC-V/NuttX implementation assumes that text/data/heap
  areas are continuous. In fact, CONFIG_ARCH_TEXT_VBASE and
  CONFIG_ARCH_HEAP_VBASE are not used for memory allocation.
- This commit assigns dedicated virtual addresses for text and heap
  which are the same approach to ARM-v7A/NuttX implementation.

Impact:
- None

Testing:
- Tested with rv-virt:knsh64 (will be updated later)

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-08-30 22:52:01 +08:00
Huang Qi
f93964ad3c riscv: Dump trap val in exception handler
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-08-30 14:55:33 +08:00
Eero Nurkkala
3665180795 risc-v/mpfs: usb: fix cppcheck findings
Fix the following cppcheck findings. Privreq may be NULL,
thus perform checks before using its member variables.

Checking mpfs_usb.c ...
mpfs_usb.c:1093:12: warning: Possible null pointer dereference: privreq [nullPointer]
      if ((privreq->inflight > 0) && (count != 0) &&
           ^
mpfs_usb.c:1090:21: note: Assignment 'privreq=NULL', assigned value is 0
          privreq = NULL;
                    ^
mpfs_usb.c:1093:12: note: Null pointer dereference
      if ((privreq->inflight > 0) && (count != 0) &&
           ^
mpfs_usb.c:1138:3: warning: Possible null pointer dereference: privreq [nullPointer]
  privreq->req.xfrd = 0;
  ^
mpfs_usb.c:1130:21: note: Assignment 'privreq=NULL', assigned value is 0
          privreq = NULL;
                    ^
mpfs_usb.c:1138:3: note: Null pointer dereference
  privreq->req.xfrd = 0;
  ^
mpfs_usb.c:1139:3: warning: Possible null pointer dereference: privreq [nullPointer]
  privreq->inflight = privreq->req.len;
  ^
mpfs_usb.c:1130:21: note: Assignment 'privreq=NULL', assigned value is 0
          privreq = NULL;
                    ^
mpfs_usb.c:1139:3: note: Null pointer dereference
  privreq->inflight = privreq->req.len;
  ^
mpfs_usb.c:1140:50: warning: Possible null pointer dereference: privreq [nullPointer]
  priv->eplist[epno].descb[0]->addr = (uintptr_t)privreq->req.buf;
                                                 ^
mpfs_usb.c:1130:21: note: Assignment 'privreq=NULL', assigned value is 0
          privreq = NULL;
                    ^
mpfs_usb.c:1140:50: note: Null pointer dereference
  priv->eplist[epno].descb[0]->addr = (uintptr_t)privreq->req.buf;

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2022-08-30 01:41:28 +08:00
Eero Nurkkala
90d9b6b8ac risc-v/mpfs: usb: fix infinite loop issue
mpfs_write_tx_fifo() gets stuck in the following case:
  - CDCACM is used
  - ttyACM0 is opened and then closed from the remote end,
    such as Linux or Windows
  - data is written into ttyACM0 from NuttX
  - tx fifo will never get empty and the system is stuck

Fix this by issuing an error code if the transmit fifo doesn't
proceed as expected. The error code is then propagated into
higher level keeping the system functional.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2022-08-29 21:35:54 +08:00
Gustavo Henrique Nihei
5ed2ee85c9 arch: Improve documentation for up_fpucmp function
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-08-26 11:57:06 +08:00
Eero Nurkkala
71ace555f2 risc-v/mpfs: ihc: fix performance issue
nxsig_usleep() will wait for the next timer tick which is way
too much here. It's not sleeping 100 us, but rather, near 1/60 s.

This causes severe performance problems. Fix this by polling the
register for a while if the remote end is busy.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2022-08-26 02:12:26 +08:00
Huang Qi
e4e3208180 Replace all strncpy with strlcpy for safety
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-08-25 13:38:36 +08:00
Jukka Laitinen
c7a904fa12 arch/risc-v/src/mpfs: Fixes for MSSIO GPIO configurations
- Clarify the macros MSSIO_EC_DEFAULT and MSSIO_EC_USB_DEFAULT
- Remove PULLDOWN bit from MSSIO_EC_DEFAULT, it was on by accident
- Fix some EC configuration macros; DRVSTR was wrong, clean up the others
- Define GPIO_PULLUP and GPIO_PULLDOWN like on many other platforms

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2022-08-24 19:25:05 +08:00
Eero Nurkkala
d940d55ee4 risc-v/mpfs: ihc: update vq ids
Since the commit cf22dd8 (related to OpenAMP update), the notifyid
is no longer NOTIFY_ALL, but the vq id.

Utilize the vq id now properly as it's being provided. However,
vq id 0 generates action.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2022-08-24 02:35:00 +08:00
Xiang Xiao
c44a7cbf88 arch: Add ARCH_COVERAGE_ALL option
so the user could disable the full image instrumentation,
but enable the instrumentation by files or directories.

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-08-23 17:50:52 +02:00
Xiang Xiao
f1355680ca mm/kasan: Add MM_KASAN_ALL option
so the user could disable the full image instrumentation,
but enable the instrumentation by files or directories.

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-08-23 17:50:52 +02:00
Huang Qi
a06ec54cd0 debug: Introduce portion of UBSan
without UBSan
```
 text    data     bss     dec     hex filename
  85612     208  142258  228078   37aee nuttx
```

with UBSan:
```
   text    data     bss     dec     hex filename
 194290   98164  208634  501088   7a560 nuttx
```

```c
int main(int argc, FAR char *argv[])
{
  uint32_t ptr[32];
  printf("Hello, World!! %lu\n", ptr[64]);
  return 0;
}
```
Try to run this sample:
```
nsh> hello
ubsan_prologue: ================================================================================
ubsan_prologue: UBSAN: array-index-out-of-bounds in hello_main.c:39:37
__ubsan_handle_out_of_bounds: index 64 is out of range for type 'uint32_t [32]'
ubsan_epilogue: ================================================================================
Hello, World!! 1070182368
nsh>
```

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-08-22 13:57:29 +08:00
Ville Juven
75ba9001bc risc-v/mpfs: Make entrypoint table run-time configurable
Default values still come from configuration, but this gives the option
to modify the per-hart entrypoints.
2022-08-18 21:50:53 +08:00
Eero Nurkkala
a1ff841ca4 risc-v/mpfs: ihc: don't use semaphores with OpenSBI vendor calls
OpenSBI vendor extension calls must not cause scheduling, as they're
part of M-mode trap handling. Thus, comment out nxsig_usleep() as
well, which is occasionally taken and crashes the system in that
case. Fix this by commenting out lines that have the potential to
cause scheduling.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2022-08-17 18:33:32 +08:00
Masayuki Ishikawa
548540eb13 arch: qemu-rv: Fix high CPU usage in SMP mode
Summary:
- I noticed that QEMU shows high CPU usage if the number of
  CPUs does not match the kernel configuration. (e.g. -smp 8
  and CONFIG_SMP_NCPUS=2)
- This commit fixes this issue.

Impact:
- qemu-rv only

Testing:
- Tested with the following configs
  - rv-virt:smp64 (CONFIG_NCPUS=1/2/8)
  - rv-virt:nsh64

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-08-13 22:41:42 +03:00
Xiang Xiao
2b37909c9e libc: Move crc8.h, crc16.h and crc32.h from include to include/nuttx
to avoid the conflict with the 3rd party library

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-08-13 13:28:24 +03:00
Ville Juven
b8b541fbf5 mpfs: Remove the ddrstorage section from the OpenSBI package
It is not really needed; g_hart_stacks is only used during SBI init as
a temporary stack area. We can use the scratch area buffers for this, as
the scratch areas define almost 4K of extra space, which is used for
exception stacks anyway.
2022-08-10 10:01:47 +03:00
Ville Juven
60042fea74 risc-v: Implement riscv_sbi_set_timer
This implements riscv_sbi_set_timer. This requires the OpenSBI companion
software to work (but this is needed by the kernel mode anyways).
2022-08-10 02:02:39 +08:00
Ville Juven
31bb362aab risc-v: Fix kernel MMU mapping for L3 table
The L3 table address was calculated incorrectly. For every 2MiB of
mapped memory, an offset of 4KiB is needed from the base of the L3
table. The old calculation failed if paddr was not aligned to a 2MiB
boundary.
2022-08-09 23:14:46 +08:00
Petro Karashchenko
b3cd9090d1 drivers/net: make sure that net driver d_buf is 16-bit aligned
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-08-05 22:21:37 +08:00
Xiang Xiao
c61381da56 arch/risc-v: Fix error: invalid application of 'sizeof' to incomplete type 'struct tls_info_s'
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-08-05 08:45:11 +03:00
Nathan Hartman
20bdd44e7b Remove executable permission from source and build files. 2022-08-04 12:48:18 -03:00
Eero Nurkkala
e0291b1ce8 risc-v/mpfs: usb: configure fifos properly
RX_FIFO_ADDRs and TX_FIFO_ADDR were misconfigured. These addresses
overlapped causing data corruption during high USB loads. For
example, data corruption was present during the following conditions:

  1. Composite USB driver was used (CDC/ACM + Mass storage)
  2. /dev/ttyACM0 was accessed instantly from Linux side when
     starting up.
  3. Training data was sent to /dev/ttyACM0 from NuttX from the
     very beginning periodically.

It was observed that while Mass storage was negotiating, sometimes
data sent from NuttX to Linux via CDC/ACM was corrupt, although it
was sent properly on the TX fifo.

Also, don't access TXCSRL_REG_EPN_TX_FIFO_NE_MASK for EP0 as it's
not applicable.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2022-08-03 23:44:12 +08:00
ligd
8c1fd1df81 rptun: update rptun to openamp 2022.04.0
Signed-off-by: ligd <liguiding1@xiaomi.com>
2022-08-03 01:22:53 +08:00
zhuyanlin
031c89db89 power: add PM_IDLE_DOMAIN to pm.h and remove definations
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2022-07-29 11:15:40 +08:00
Xiang Xiao
13a7ae3d06 arch: Call board_reset before up_irq_save and spin_trylock
since board_reset may call some kernel functions which try
to acquire the lock again

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-07-28 08:18:24 -04:00
Masayuki Ishikawa
1742b7f6a4 arch: risc-v: Fix warnings in common/crt0.c
Summary:
- This commit fixes warnings in common/crt0.c

Impact:
- None

Testing:
- Build only

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-07-27 23:22:23 +08:00
Jiuzhu Dong
9d4549d48b arch: limit output maximum size stackdump when sp is not within stack
Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
2022-07-27 20:48:33 +08:00
Jiuzhu Dong
136b1d6d42 arch: using remain to ignore invalid stack content when sp is not within stack
Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
2022-07-27 20:48:33 +08:00
Jiuzhu Dong
91d8ed319e arch/riscv: optimize stackdump
Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
2022-07-27 20:48:33 +08:00
Jiuzhu Dong
5c8fd46126 arch/stack: rename do_stack_check with arch prefix
Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
2022-07-27 20:48:33 +08:00
Jiuzhu Dong
79597d0caf arch/up_stack_check: using running_task to get correct task context
Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
2022-07-27 20:48:33 +08:00
ligd
8a3683fb9f rptun: add ns_match callback to resolve rptun deadlock
thread A: accept -> net_lock -> socket_rpmsg_accept
          -> rpmsg_register_callabck -> rptun_lock
thread B: ns_bind -> rpmsg_socket_ns_bind -> get_tx_payload_buffer
          -> rptun_wait_tx -> usrsock_rpmsg_ept_cb -> usrsockdev_write
          -> net_lock -> deadlock

fix:
add ns_match callback

Signed-off-by: ligd <liguiding1@xiaomi.com>
2022-07-27 20:36:51 +08:00
Jouni Ukkonen
e268b23142 OpenSBI: Add configurable support for domain init
Initialize .domains_init function entry point in sbi_platform_operations when
CONFIG_OPENSBI_DOMAINS=y. In this case, the board specific code must provide
the "board_domains_init" function.

Signed-off-by: Jouni Ukkonen <jouni.ukkonen@unikie.com>
2022-07-22 19:00:33 +03:00
Abdelatif Guettouche
ae1cbc47ef esp32&c3/Kconfig: CONFIG_ESP32(C3)_WIRELESS doesn't need to be user
selectable.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-07-20 22:02:28 +03:00
Abdelatif Guettouche
20c6996e81 esp32c3/Kconfig: Don't select options already selected.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-07-20 22:02:28 +03:00
Xiang Xiao
2166c98809 Add printflike and scanflike to all printf/scanf like functions
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-07-18 14:14:36 +03:00
Xiang Xiao
aad5fbd2fb arch: Add up_nputs function to handle the non '\0' string correctly
and change up_puts as a simple macro

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-07-17 17:31:19 +03:00
Gustavo Henrique Nihei
e24621d545 arch: Convert DEBUGASSERT(false) into more intuitive DEBUGPANIC()
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-07-14 12:08:45 +08:00
Gustavo Henrique Nihei
8a4c9c3489 arch: Fix typo in "register" word
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-07-13 22:57:19 +03:00
Eero Nurkkala
14447600ac risc-v/mpfs: usb: fix illegal reads
With faster data transfer rates, it was seen that the read
requests occasionally were issued while the USB RX operation
was actually in progress.  This patch makes sure the system
doesn't accidentally read the RX fifo while it's being filled
up, but rather, checks for the RXCSRL_REG_EPN_RX_PKT_RDY_MASK
flag.  This flag indicates the packet is ready to be read.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2022-07-12 18:34:28 +08:00
Gustavo Henrique Nihei
5e32aa14bf risc-v/esp32c3: Fix verification of ROM function return values
cache_dbus_mmu_set and cache_ibus_mmu_set return positive values in case
of errors, so DEBUVERIFY could never detect them since this macro checks
for negative values.
Besides, the successful execution of those functions is mandatory for
the reliable operation under Protected Mode, so the verification is
always performed, even when DEBUG is not enabled.

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-07-12 10:56:59 +08:00
Nathan Hartman
849f760b77 Fix various typos 2022-07-08 02:15:54 +08:00
Abdelatif Guettouche
0bdf713df0 risc-v/esp32c3: Add the rest of the reset causes.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-07-08 01:06:35 +08:00
Xiang Xiao
3daa18b661 arch: Remove the unnecessary #if/#endif in assert
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-07-07 19:25:47 +03:00
Xiang Xiao
9ff0971d3f arch: Correct the order of stack related information in assert
forget to update in this patch:
commit b02db04e00
Author: Xiang Xiao <xiaoxiang@xiaomi.com>
Date:   Sun Jun 5 17:10:19 2022 +0800

    arch/assert: Keep the thread dump column order same as ps

    Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-07-07 19:25:47 +03:00
Xiang Xiao
9ab3417882 arch/risc-v: Move __XSTR, FLOAD/FSTORE and REGLOAD/REGSTORE to the right place
1.Move __XSTR from include/arch.h to include/irq.h
2.Move  FLOAD/FSTORE and REGLOAD/REGSTORE from include/arch.h to src/common/riscv_internal.h

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-07-04 13:25:56 +03:00
Xiang Xiao
c20ed58879 arch: Remove the inclusion of arch/irq.h from chip/irq.h
since arch/irq.h will include chip/irq.h

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-07-04 13:03:47 +03:00
Xiang Xiao
3d1ce144df arch: Move up_getsp from arch.h to irq.h
since all other special register operation in irq.h

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-07-01 10:44:55 -03:00
Gustavo Henrique Nihei
5ce77fad1b arch: Remove "0x" prefix preceding "%p" specifier on format string
The "p" format specifier already prepends the pointer address with "0x"
when printing.

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-06-30 22:08:58 +03:00
Eero Nurkkala
ef28d915fe risc-v/mpfs: ihc: don't start rptun automatically
Starting the rptun with the autostart flag set will cause significant
delays at the boot, as it will wait for the master to be up. U-boot/linux
combination may take more than 10 seconds to boot to the point where the
rpmsg bus is initialized.

For now, the user needs to initialize the rptun separately, for example,
by issuing the following command:

  rptun start /dev/rptun/mpfs-ihc

This command will also block if started before the rpmsg bus master is up.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2022-06-28 11:34:38 -03:00
Ville Juven
cfebb5a5c1 risc-v: Move common memory map to its own file from riscv_internal
Move the linker defined symbols to a separate file, so they can be
accessed without pulling in everything from riscv_internal.h and
whatever it includes (e.g. syscall.h drags in a lot).
2022-06-28 14:41:56 +03:00
Nimish Telang
4afd25b567 this flag is meaningless for the linker 2022-06-27 20:03:03 -03:00
Ville Juven
77a01cfe52 mpfs: Fix IHC memory locations to native width type
Ne numeric type defaults to u32 which is not enough to represent a
native memory location

This fixes build error:
https://github.com/apache/incubator-nuttx/runs/7067877053?check_suite_focus=true
2022-06-27 20:49:00 +08:00
Jukka Laitinen
ba1b8d0712 arch/risc-v/src/mpfs: Add mpfs_gpiosetevent and gpio irq handling functions
Add a function to easily enable event handling on fabric and mss gpios. This
is similar to what exists e.g. for stm32 arm chips.

Also fix some small bugs in mpfs_configgpio related to IRQ bits configuration

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2022-06-23 21:45:15 +08:00
Eero Nurkkala
92760f89eb risc-v/mpfs: emmcsd: fix two issues
This patch fixes the following issues:
  1. MPFS_EMMCSD_HRS06_EMM bitmask had to be 0x7, not 0x03
  2. putreg32() caused outright memory corruption as the
     arguments were in wrong order

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2022-06-22 09:50:33 +03:00
Huang Qi
9481456fde risc-v/esp32c3: Implement up_perf_xxx API
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-06-21 21:35:22 +08:00
Richard Tucker
8f36649aad arch/risc-v/src/litex/litex_emac: add liteeth peripheral driver
See the following for details on the pepheral:
https://github.com/enjoy-digital/liteeth
2022-06-21 12:06:37 +03:00
AuroraRAS
0fe219a8c9 Add I2C_M_NOSTART and I2C_M_NOSTOP support in esp32c3_i2c
Signed-off-by: AuroraRAS <chplee@gmail.com>
2022-06-20 10:34:22 -03:00
Ville Juven
6cb77a8d84 mpfs: Allow mapping of RAM/ROM regions from different memory areas
The old implementation needed a contiguous memory block for user
ROM/RAM. This is because there was only 1 L3 page table which can only
map a contiguous memory area.

Also, remove the PMP configuration which just complicates things,
rely on the MMU mappings instead.
2022-06-20 21:24:18 +08:00
Jukka Laitinen
d8cc1fd76d arch/riscv/mpfs: Add a config flag to select SD mux state
This has been previously hard-coded to SD-card. Make it build time configurable.

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2022-06-16 09:17:30 -03:00
Eero Nurkkala
5683e020e8 risc-v/mpfs: update clock configuration parameters
Update PLL configuration parameters to match the values provided
by the vendor.

Also remove extra call to mpfs_pll_config() as it's already called
at mpfs_clockconfig().

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2022-06-15 21:29:45 +08:00
Masayuki Ishikawa
a0ff6f9fa6 arch: k210: Add a workaround for clock stabilization
Summary:
- I noticed that sometimes uart shows nothing on the maix-bit board.
- This commit adds a workaround to avoid such the issue

Impact:
- k210 only

Testing:
- Tested with maix-bit

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-06-13 11:42:59 +08:00
Norman Rasmussen
e6376c72d7 Fix CONFIG_ALLSYMS for arm, risc-v and xtensa after #5496 2022-06-13 11:39:06 +08:00
Gustavo Henrique Nihei
59da1bc86a risc-v/esp32c3: Disable region protection on IDFboot for Flat build
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-06-11 01:55:46 +08:00
Gustavo Henrique Nihei
5805ad3954 risc-v/esp32c3: Disable access to invalid memory regions using MPU
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-06-11 01:55:46 +08:00
Ville Juven
16286081e1 risc-v/mpfs: Move the entry point to .start section
Remove the object linkage and use an explicit .start section
2022-06-10 20:18:23 +08:00
Eero Nurkkala
39d389545e risc-v/mpfs: usb: add composite support
This provides USB composite (CDC/ACM and Mass Storage) support
for mpfs board. In addition, a number of USB fixes are included:

 - Support for Setup Out packets
 - Proper support for larger than packet size writes
 - Finishing setup packets properly

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2022-06-09 20:44:40 +08:00
Jukka Laitinen
b7a1b75a3b arch/risc-v/src/mpfs/mpfs_start.c: Don't boot if DDR is enabled and training fails
Output "X" with showprogress and make a system reset.

Silently ignoring failed training is dangerous and will cause random behaviour if DDR is used

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2022-06-09 09:36:38 -03:00
Abdelatif Guettouche
326183bbbc esp32c3/Kconfig: Remove duplicate wireless config
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-06-09 20:19:35 +08:00
Xiang Xiao
f1236da21c fs: Make the binary(no process) mode as the default
POSIX require file system shouldn't enable the \r and \n conversion by default
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-06-07 20:22:26 +03:00
Xiang Xiao
28b25e0391 arch: dump "<noname>" as the task name if CONFIG_TASK_NAME_SIZE equals 0
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-06-07 20:17:23 +03:00
Xiang Xiao
2b2830c252 arch/assert: Replace twice strlcpy with single snprintf
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-06-07 20:17:23 +03:00
Xiang Xiao
b02db04e00 arch/assert: Keep the thread dump column order same as ps
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-06-07 20:17:23 +03:00
Xiang Xiao
c52a19c8dc arch: Include nuttx/tls.h in *_assert.c
to avoid error: "invalid use of undefined type 'struct task_info_s'

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-06-07 20:17:23 +03:00
ligd
118fd3902c dump_task: also dump thread param when dump thread name
Signed-off-by: ligd <liguiding1@xiaomi.com>
2022-06-07 20:17:23 +03:00
Richard Tucker
2b8c59fcf1 arch/risc-v/litex: fix typo 2022-06-04 17:04:42 +03:00
Xiang Xiao
11e1a8b28b arch: Define WCHAR_[MIN|MAX] in arch/include/limits.h
follow up the below change:
commit 6357523892
Author: Xiang Xiao <xiaoxiang@xiaomi.com>
Date:   Mon Nov 1 12:40:51 2021 +0800

    arch: Add _wchar_t typedef like other basic types

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-06-03 22:25:49 +03:00
Richard Tucker
85af65e72e arch/risc-v: re-add missing riscv_udelay source
This was broken with: 9d9d591b93
2022-06-03 16:39:30 +08:00
zhanghongyu
035d925864 devif: remove all devif_timer
Signed-off-by: zhanghongyu <zhanghongyu@xiaomi.com>
2022-06-02 20:11:50 -03:00
Huang Qi
9d9d591b93 arch/risc-v: Unify common source include
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-05-31 07:59:33 +03:00
Huang Qi
eb02528a39 arch/risc-v/qemu-rv: Fix a typo in Make.defs 2022-05-30 19:58:43 +08:00
Huang Qi
571e66d03f arch/risc-v: Remove unused rv32m1_vectors.S
Since it had been merged into rv32m1_head.S

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-05-30 19:58:43 +08:00
Xiang Xiao
7ec6b4c7dd Change dpends on SCHED_[L|H]PWORK to SCHED_WORKQUEUE
since the code could map the unsupported work to the
supported one and remove select SCHED_WORKQUEUE from
Kconfig since SCHED_[L|H]PWORK already do the selection

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-05-28 18:41:51 +03:00
chao.an
3f65b562bb arch: inline up_interrupt_context()
inline the up_interrupt_context() to avoid unnecessary stack pushes

Signed-off-by: chao.an <anchao@xiaomi.com>
2022-05-26 04:36:07 +08:00
Gustavo Henrique Nihei
18d74dbea0 risc-v/esp32c3: Fix leak of semaphores created by Wi-Fi kernel thread
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-05-25 09:46:30 +09:00
Gustavo Henrique Nihei
b2d77c0e9c Revert "risc-v/esp32c3: Use onexit to free thread private semaphore"
This reverts commit f5eaf82c93.

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-05-25 09:46:30 +09:00
Eero Nurkkala
3ea7d4bab4 risc-v/mpfs: amend OpenSBI to utilize IHC
Linux kernel uses M-mode trap for handling Inter-Hart Communication (IHC).
This patch provides all the required functionalities for this purpose.
Previously, HSS bootloader was required. Now, NuttX is run as the
bootloader providing OpenSBI vendor extensions instead. This setup has
been tested on the following configuration:

 - Hart 0 has NuttX in bootloader mode with OpenSBI
 - Hart 1 unused
 - Hart 2 has NuttX configured at 0xa2000000
 - Hart 3 has U-boot / Linux kernel (at 0x80200000)
 - Hart 4 has U-boot / Linux kernel (at 0x80200000)

Upon startup, NuttX on hart 0 will initialize SD-card driver, loads
the hart 2 NuttX from the SD-card and loads the U-boot to 0x80200000.
Also the nuttx.sbi -binary is loaded from SD-card into address 0x80000000,
which is also marked as reserved area in the Linux kernel device tree (for
the chuck 0x80000000 - 0x80200000).

Hart 2 NuttX waits until Linux kernel (IHC master) is started. After the
initial handshake, RPMsg / virtIO bus along with the IHC may be used for
proper AMP mode.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2022-05-24 03:25:37 +08:00
Masayuki Ishikawa
84bcb075d7 arch: risc-v: Fix crt0.c if CONFIG_HAVE_CXX is not set
Summary:
- I noticed that rv-virt:knsh64 crashes when it executes the init.
- This commit fixes this issue.

Impact:
- None

Testing:
- Tested with rv-virt:knsh64

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-05-23 21:19:01 +08:00
Ville Juven
621062dc1d MPFS: Implement S-mode head and start function
- Remove S-mode initializations from the M-mode head file, they are not
  required
- Writing mstatus->tvm from S-mode will result in illegal instruction
2022-05-22 15:42:30 +03:00
YAMAMOTO Takashi
c60bb81387 esp32c3: Implement up_textheap_heapmember 2022-05-20 21:16:42 +08:00
Ville Juven
91063e85f0 risc-v/vfork: FPU was not saved correctly
The FPU register saving upon vfork entry was missing.

Also added macro that tells the actual size of an FPU reg, instead
of just having a coefficient for qfpu/no-qfpu.
2022-05-20 15:59:24 +08:00
Ville Juven
1ec70bc704 risc-v/vfork: Save FPU registers
Save the callee saved FPU registers
2022-05-19 09:05:00 -03:00
Ville Juven
ef42b7c31e risc-v/irq: Add ABI name versions of FPU registers 2022-05-19 09:05:00 -03:00
Ville Juven
ec073d91c7 risc-v/vfork: Save correct amount of registers for vfork
The original code does not obey RISC-V calling conventions, looks like
it was copy&pasted from MIPS instead.
2022-05-19 09:05:00 -03:00
Ville Juven
12476e1f43 RISC-V: add C++ support to crt0 2022-05-19 01:35:36 +08:00
Xiang Xiao
b30e0a26ef Move "-nostartfiles -nodefaultlibs" from Make.defs to Toolchian.defs
and replace "-nostartfiles -nodefaultlibs" with "-nostdlib"

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-05-18 08:26:02 -04:00