Commit Graph

54018 Commits

Author SHA1 Message Date
Yanfeng Liu
77cfbf8914 riscv/fork: fix gp register handling
This fixes the handling of gp register in fork.

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
2024-08-08 09:42:29 +08:00
Yanfeng Liu
3f021d5429 riscv/fork: fix fp/s0 field position
The fp/s0 field position shall be in line with the macro
FORK_FP_OFFSET/FORK_S0_OFFSET.

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
2024-08-08 09:42:29 +08:00
zhangshoukui
5df3f5d4f7 Added the documentation about the iic slave driver
Signed-off-by: zhangshoukui <zhangshoukui@xiaomi.com>
2024-08-07 12:13:38 -03:00
Shoukui Zhang
75fa94af02 i2c_slave: add poll waiters array
Signed-off-by: Shoukui Zhang <zhangshoukui@xiaomi.com>
2024-08-07 12:13:38 -03:00
Shoukui Zhang
f94160095e Adapt i2c slave callback interface for rp2040 and s32k11x
Signed-off-by: Shoukui Zhang <zhangshoukui@xiaomi.com>
2024-08-07 12:13:38 -03:00
Shoukui Zhang
4e6f3e9360 I2c slave: Add POLLOUT event for notifie slave write success
Signed-off-by: Shoukui Zhang <zhangshoukui@xiaomi.com>
2024-08-07 12:13:38 -03:00
Shoukui Zhang
2093038315 add setup and shutdown for i2c master and slave
Signed-off-by: Shoukui Zhang <zhangshoukui@xiaomi.com>
2024-08-07 12:13:38 -03:00
Shoukui Zhang
1ea19e7c54 fix i2c slave register failed
Signed-off-by: Shoukui Zhang <zhangshoukui@xiaomi.com>
2024-08-07 12:13:38 -03:00
Shoukui Zhang
f4a234613e Add I2C Slave driver
Signed-off-by: Shoukui Zhang <zhangshoukui@xiaomi.com>
2024-08-07 12:13:38 -03:00
Shoukui Zhang
6114c0b948 i2c: Remove useless restrictions
Signed-off-by: Shoukui Zhang <zhangshoukui@xiaomi.com>
2024-08-07 12:13:38 -03:00
Shoukui Zhang
2bf13ffbb0 spi: Optimize access to private data
Signed-off-by: Shoukui Zhang <zhangshoukui@xiaomi.com>
2024-08-07 12:13:38 -03:00
Shoukui Zhang
a6cea0d82e Restriction declaration spi_slave_unlink function
Signed-off-by: Shoukui Zhang <zhangshoukui@xiaomi.com>
2024-08-07 12:13:38 -03:00
Shoukui Zhang
9ffac12465 spi: Remove useless restrictions
Signed-off-by: Shoukui Zhang <zhangshoukui@xiaomi.com>
2024-08-07 12:13:38 -03:00
Lup Yuen Lee
52583fc17e tools/ci: Add Rust Target for QEMU RISC-V 64-bit
This PR updates the Docker Image for NuttX CI, so that it builds Rust Apps correctly for QEMU RISC-V 64-bit. We add the Rust Target for `riscv64gc-unknown-none-elf` to the Docker Image.

In the next PR, we will call the Updated Docker Image to [compile the Rust App `leds_rust`](https://github.com/apache/nuttx/pull/12852), at every run of NuttX CI. This will validate whether Rust Apps are built correctly for QEMU RISC-V 64-bit.

Modified Files:

`tools/ci/docker/linux/Dockerfile`: Add Rust Target `riscv64gc-unknown-none-elf` for Docker CI

`tools/ci/platforms/ubuntu.sh`: Same as above, but for Ubuntu CI

`tools/ci/platforms/msys2.sh`: Same as above, but for MSYS2 CI
2024-08-07 19:59:56 +08:00
zouboan
d759611e90 Documentation/platforms:add documentation for Zynq MPSoC and ZCU111
Co-authored-by: Alan Carvalho de Assis <alan.carvalho@espressif.com>
2024-08-07 16:21:51 +08:00
YAMAMOTO Takashi
d9c90eef13 esp32s3-devkit/toywasm: enable ESP32S3_SPI_FLASH_SUPPORT_PSRAM_STACK 2024-08-07 15:59:41 +08:00
Lup Yuen Lee
788f91c677 tools/[Rust|D]: Fix the Rust and D Builds for QEMU RISC-V
This PR fixes the build for Rust Apps and D Apps on QEMU RISC-V. Previously the Rust Build selected the [incorrect Rust Target riscv64i-unknown-none-elf](https://lupyuen.github.io/articles/rust5#rust-target-is-incorrect). Now the Rust Build selects the correct Rust Target: riscv64gc-unknown-none-elf.

This PR also fixes the 32-bit RISC-V Target for D Apps. D Targets ("riscv32") are named differently from Rust Targets ("riscv32gc"), this PR restores the correct Target Names.

Note that Rust Apps won't build correctly for QEMU RISC-V 32-bit. This requires a [Rust Custom Target for riscv32gc](https://lupyuen.github.io/articles/rust4#custom-target-for-rust), which will make the NuttX Makefiles much more complicated.

Also note that `hello_d` won't build correctly for 64-bit `rv-virt:nsh64`. To date, NuttX has never supported 64-bit RISC-V for D Apps.

Modified Files:

`tools/Rust.defs`: Rename the RISC-V ISA `imafdc` to `gc` for Rust Targets

`tools/D.defs`: Exclude the RISC-V ISA for D Targets
2024-08-07 10:03:43 +08:00
Ville Juven
9da9d3ea8c binfmt/elf_loadfile: Set sh_addr even if SHF_ALLOC == 0
Set sh_addr for regions that are not allocated. Some relocations might
depend on this.

The fault in my case occurs when setting CONFIG_HAVE_CXX=y. In this case,
the .ctor and .dtor sections do not get allocated, but the crt code
depends on linker defined symbols _sctors/_ectors etc. These generate PC
relative relocations and thus, the .ctor and .dtor output sections need
an output VMA even though nothing is there. Otherwise the relocations will
point to god knows where (in my case to address 0).

The problem results in full system crash later:
elf_symvalue: Other: 00000000+00000001=00000001
up_relocateadd: PCREL_HI20 at c00002dc [00000417] to sym=0x80409e80 st_value=1
_calc_imm: offset=-3221226203: hi=-786432 lo=-731
up_relocateadd: ERROR: PCREL_HI20 at c00002dc bad:ffffffff40000000
elf_relocateadd: ERROR: Section 2 reloc 52: Relocation failed: -22

The RISC-V elf64 linker does not like the uninitialized PC relative
relocation entries, as the relocation offset cannot be reached with
with the RV64 instruction set.

More about this issue can be found here:
https://github.com/apache/nuttx/pull/11322
2024-08-07 08:45:50 +08:00
Daniel Jasinski
a09867df8c build: Fix libc/pwd CMakeLists.txt
This commit fixes erronous assignment of lib_pwd_globals.c
previously guarded by CONFIG_LIBC_PASSWD_FILE. Original
Make.defs file has this in CSRCS scope.

Signed-off-by: Daniel Jasinski <jasinskidaniel95szcz@gmail.com>
2024-08-07 08:45:19 +08:00
Ville Juven
2eb26d04f4 rv-virt/pnsh: Refresh PROTECTED mode configs 2024-08-07 02:41:14 +08:00
Ville Juven
622e5b26b3 riscv/syscall: Fix fork() system call
When executing fork() via a system call, the parent's stack gets corrupted
by the child, as during exception return the child loads the parent's
stack pointer from the context save area.

This happens because the full parent stack (including what has been pushed
during the system call) is copied to the child. What should be copied, is
only the user stack of the parent (the kernel stack is not interesting).

Fix this by only copying the parent's user stack to the child; and make
the child return directly to userspace (not via dispatch_syscall).
2024-08-07 02:41:14 +08:00
Ville Juven
2cf8ac2f63 risc-v/riscv_swint.c: Simplify implementation of dispatch_syscall
Simplifies the implementation of dispatch_syscall, making it easier to
understand and maintain. Let the C-compiler do most of the work, instead
of doing everything as inline assembly.
2024-08-07 02:41:14 +08:00
Ville Juven
fa71bc3d74 riscv/syscall: Add dependency to RISCV_PERCPU_SCRATCH when LIB_SYSCALL=y
The per CPU scratch register is needed by system calls -> enable it by
default.
2024-08-07 02:41:14 +08:00
Julian Oes
75c65c7ce9 arch/stm32h7: add defines for USART clock selection
This adds the necessary defines to set the USARTs' kernel clock source
selection.

This is required for a configuration where the bootloader (running
before NuttX) changes the USARTs' clock selection, so they need to be
restored on board init.

This is according to the reference manual RM0399 page 448.
2024-08-06 14:31:21 +08:00
simbit18
439b9e9683 ISSUE_TEMPLATE: Fixed incorrect links for issue forms
Correct links:

- Bug report

- Feature request

- General Help

add BSD keyword
2024-08-05 15:35:48 -03:00
Filipe Cavalcanti
65e989e063 arch/risc-v: add support for motor control on ESP32|C6|H2 2024-08-05 15:35:19 -03:00
Rodrigo Sim
fddebc267d arm/stm32f401rc-rs485: Add support to RFID MFRC522
Signed-off-by: Rodrigo Sim rcsim10@gmail.com
2024-08-05 11:03:29 -03:00
Yanfeng Liu
a36c168e54 riscv/nsbi: fix up_udelay for rv32
This fixes riscv_sbi_get_time for rv32 and NuttSBI is used.

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
2024-08-05 16:21:49 +08:00
chao an
4ef3eeb305 arch/x86_64: fix build break if disable CONFIG_SPINLOCK
Create version.h
chip/intel64_irq.c:78:34: error: conflicting type qualifiers for ‘g_irq_spin’
   78 | static spinlock_t                g_irq_spin;
      |                                  ^~~~~~~~~~
In file included from chip/intel64_irq.c:40:
include/nuttx/spinlock.h:168:28: note: previous declaration of ‘g_irq_spin’ with type ‘spinlock_t’ {aka ‘volatile unsigned char’}
  168 | extern volatile spinlock_t g_irq_spin;
      |                            ^~~~~~~~~~
chip/intel64_cpu.c: In function ‘x86_64_cpu_ready_set’:
chip/intel64_cpu.c:314:3: warning: implicit declaration of function ‘spin_lock’ [-Wimplicit-function-declaration]
  314 |   spin_lock(&g_ap_boot);
      |   ^~~~~~~~~
chip/intel64_cpu.c:322:3: warning: implicit declaration of function ‘spin_unlock’; did you mean ‘sched_unlock’? [-Wimplicit-function-declaration]
  322 |   spin_unlock(&g_ap_boot);
      |   ^~~~~~~~~~~

Signed-off-by: chao an <anchao@lixiang.com>
2024-08-05 16:20:47 +08:00
chao an
0801adb08f spinlock: compile spinlock only if CONFIG_SPINLOCK is enabled
Regression by: #12599

Signed-off-by: chao an <anchao@lixiang.com>
2024-08-05 16:20:47 +08:00
chao an
555dab3da3 spinlock: inline irqsaved spinlock
Reference pull request: #12599

Signed-off-by: chao an <anchao@lixiang.com>
2024-08-05 16:20:47 +08:00
chao an
500ebd6498 spinlock: fix unused parameter
fix unused parameter if unlock spinlock from different function

Signed-off-by: chao an <anchao@lixiang.com>
2024-08-05 16:20:47 +08:00
chao an
3374e82c4c spinlock: inline no trace implement to remove duplicate logic
minor changes to remove duplicate logic

Signed-off-by: chao an <anchao@lixiang.com>
2024-08-05 16:20:47 +08:00
chao an
fb0e46660a spinlock: fix typo of sched_note_spinlock_unlock()
should be sched_note_spinlock_unlock() not sched_note_spinlock_unlocked()

Signed-off-by: chao an <anchao@lixiang.com>
2024-08-05 16:20:47 +08:00
Huang Qi
1eca39eacc tools/[Rust|D]: Fix build break for RISC-V
Rust/D support for RISC-V is broken after https://github.com/apache/nuttx/pull/11549,
since the target triple is quite different bewteen Rust/D toolchain and GCC,
only few RISC-V targets are supported by Rust toolchain now, so it's better to
construct target triple in Rust.defs/D.defs for RISC-V.
2024-08-05 16:20:19 +08:00
chao an
cc6accdf16 Kconfig/style: fix Kconfig style issue
fix this issue reviewed by PR:
https://github.com/apache/nuttx/pull/12667
https://github.com/apache/nuttx/pull/12667#discussion_r1699358220

Signed-off-by: chao an <anchao@lixiang.com>
2024-08-04 23:16:15 +08:00
Huang Qi
e09a79ece9 driver/ssd1680: Add support for 1.54 inch e-paper display
Add configuration and driver support for the SSD1681 1.54 inch e-paper display,
including the necessary waveforms and settings for proper operation. This extends
the existing SSD1680 e-paper driver to accommodate the new display module.

The changes involve updates to the Kconfig file for additional configuration options,
modifications to the driver implementation in ssd1680.c to include SSD1681 specific
logic, and updates to the header file ssd1680.h to reflect the added support.

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2024-08-04 23:14:55 +08:00
halyssonJr
88fb747091 update board configuration on documentation. 2024-08-04 11:44:34 +08:00
halyssonJr
415fc185cb add defconfig to userleds 2024-08-04 11:44:34 +08:00
Yanfeng Liu
5848a8e77c riscv/qemu-rv: revise PROTECTED mode
This revises PROTECTED build for qemu-rv mainly to avoid hard-coded
addresses in linker scripts. It also added rv32 support, cleaned up
config `pnsh64` and added config `pnsh`.

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
2024-08-04 11:09:26 +08:00
Huang Qi
ba4769d412 doc: Fix code blocks in thread_local_storage.rst
Add missing blank line before the code block to
render it correctly.

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2024-08-03 21:15:05 +08:00
Lwazi Dube
f3ddb3ffac drivers/serial: Make the 16550 rx trigger level configurable
To avoid breaking other configs, the default value 2 is equal to the original
hard coded value.
2024-08-03 10:31:36 +08:00
simbit18
cf0e832f2b Added Issue templates
Template

Bug report
Report a bug to improve NuttX stability

Feature request
Request an enhancement for NuttX

General Help
Get general support regarding NuttX

Action
An action for automatically labelling issues
2024-08-02 15:13:14 -03:00
Yanfeng Liu
160ca004ac procfs/meminfo: free delaylist for PROTECTED
This triggers `mm_free_delaylist()` before dumping status in PROTECTED
build, otherwise the `free` command still shows delaylist as `used`.

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
2024-08-03 01:30:04 +08:00
Yanfeng Liu
cafee0e086 mm/mm.h: add mm_free_delaylist interface
This adds explicit `void mm_free_delaylist(heap)` interface so that
to force freeing the heap's delaylist.

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
2024-08-03 01:30:04 +08:00
Alexey Matveev
e9d20bd611 Add mkfsdata.py 2024-08-03 01:29:09 +08:00
Ville Juven
1f928b2338 qemu-rv: Add test target pnsh64 for BUILD_PROTECTED
This adds BUILD_PROTECTED target for rv-virt (rv-virt:pnsh64).
2024-08-02 20:29:11 +08:00
adriendesp
6ef8a73614 arch/xmc4 : fixed critical section in i2c_transfer
The critical section was declared at the wrong place.
The critical section wasn't left if error returned.
2024-08-02 20:28:25 +08:00
Roberto Bucher
f5df946676 Additional encoder for F7 and added functions for TimerHook for F745 and H745 and H743 2024-08-02 20:26:06 +08:00
buxiasen
1de538282e tools/parsememdump: speed up use mem addr cache and multi-thread
Signed-off-by: buxiasen <buxiasen@xiaomi.com>
2024-08-02 13:40:14 +08:00