Anton D. Kachalov
b10095ed59
[arm/src/moxart/irq] irq_decode: process one irq at once
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Signed-off-by: Anton D. Kachalov <mouse@yandex-team.ru>
2015-07-29 19:13:47 +03:00
Anton D. Kachalov
ab27747484
[arm/src/moxart/irq] irq_decode: process several interrupts at once
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Signed-off-by: Anton D. Kachalov <mouse@yandex-team.ru>
2015-07-29 19:13:47 +03:00
Anton D. Kachalov
ea6c65d813
[moxart/moxart_timer] Correct compare value for T1
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Signed-off-by: Anton D. Kachalov <mouse@yandex-team.ru>
2015-07-29 19:13:47 +03:00
Anton D. Kachalov
309ee5d348
[moxart/moxart_irq] Cleanup includes
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Signed-off-by: Anton D. Kachalov <mouse@yandex-team.ru>
2015-07-29 19:13:47 +03:00
Anton D. Kachalov
7f28335f81
[moxart/moxart_timer] Div clock by 8
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Signed-off-by: Anton D. Kachalov <mouse@yandex-team.ru>
2015-07-29 19:13:47 +03:00
Anton D. Kachalov
46c8885814
[arm/moxart/moxart_irq] Typo fix
2015-07-29 19:13:47 +03:00
Anton D. Kachalov
75762f1519
Add support for MoxaRT
2015-07-29 19:13:47 +03:00
Juha Niskanen
3d32eb9465
tm32_adc: Add STM32L152XX ADC support
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Porting from Thingsee OS.
Credits: Dmitry Nikolaev wrote most of the code, Teemu Pirinen from Offcode Ltd.
contributed support for changing single shot adc channel, minor tweeks by
Jussi Kivilinna and Juha Niskanen
Signed-off-by: Juha Niskanen <juha.niskanen@haltian.com>
Includes additional changes from review.
2015-07-29 08:34:27 -06:00
Gregory Nutt
032c237865
Minor modifications from review of previous commits
2015-07-29 08:34:01 -06:00
Gregory Nutt
90ac233e09
Minor modifications from review of previous changes
2015-07-29 08:32:23 -06:00
Juha Niskanen
ddc93995a0
chip/stm32_adc.h: Add defines for STM32L152XX ADC support
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Signed-off-by: Juha Niskanen <juha.niskanen@haltian.com>
2015-07-29 07:38:29 -06:00
Juha Niskanen
f4812bfbf9
stm32/chip: Add some STM32L15XX support bits (from Thingsee)
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Signed-off-by: Juha Niskanen <juha.niskanen@haltian.com>
2015-07-29 07:36:21 -06:00
Gregory Nutt
eddf8161a5
Add scheduler resume/suspend calls to all implementations of up_release_pending()
2015-07-26 10:13:29 -06:00
Gregory Nutt
37969b8279
Add scheduler resume/suspend calls to all implementations of up_reprioritize_rtr()
2015-07-26 09:46:28 -06:00
Gregory Nutt
838c5355eb
Correct resume scheduler hooks and add suspend scheduler hooks to all implementations of up_unblock_task
2015-07-26 09:07:47 -06:00
Gregory Nutt
a92c0a10ab
Add scheduler resume/suspend calls in all implementations of up_block_task()
2015-07-26 08:31:23 -06:00
Gregory Nutt
9d98177daa
Add logic to reset the replenish the sporadic scheduler when a task is resumed
2015-07-24 09:54:28 -06:00
Gregory Nutt
39192c3537
Fix a compile error found by tools/tesbuild.sh
2015-07-22 15:45:47 -06:00
Gregory Nutt
999452c3ae
Eliminate a warning detected by nuttx/tools/testbuild.sh
2015-07-22 14:11:10 -06:00
Gregory Nutt
ca203f6a4f
Fix warnings from the STM32F7 pinmap.h header file; add a .gitignore file
2015-07-22 11:00:41 -06:00
David Sidrane
778c630c6b
Add support for the STM32446. From David Sidrane
2015-07-22 07:26:53 -06:00
David Sidrane
092488cbd0
Make some STM32F7 pin naming more consistent
2015-07-21 15:33:56 -06:00
David Sidrane
e36ca25c5c
STM32: Fix incorrect naming of inclusion guard in IRQ header files
2015-07-21 12:25:15 -06:00
David Sidrane
e7d039ac2b
STM32: Fix incorrect naming of inclusion guard in IRQ header files
2015-07-21 11:30:45 -06:00
David Sidrane
5c5df7aefe
STM32 F229: Fix bad inclusion guard in a header file
2015-07-21 11:25:29 -06:00
Gregory Nutt
9c284bb05f
Syscall fixes: Add support for Cortex-M7; mount syscall has to be suppressed if there are no mountable file systems
2015-07-21 11:20:46 -06:00
Gregory Nutt
d2c8d4a495
Review/updated Cortex-M7 MPU definitions
2015-07-21 11:19:14 -06:00
Gregory Nutt
ba2046d0cd
STM32 F7: Port some F4 protected mode files to the F7
2015-07-21 07:59:20 -06:00
Max Neklyudov
b13e182099
Correct some problems with SAM3/4 watchdog driver. Includes some small improvements. From Max Neklyudov.
2015-07-21 07:15:39 -06:00
David Sidrane
e6216a9175
Correct some typos in the STM32 F7 RCC register definition header file. From David Sidrane.
2015-07-21 06:51:33 -06:00
Gregory Nutt
84ffc1fe2c
STM32 F7 Ethernet: Fix some backward conditinal compilation
2015-07-20 15:49:07 -06:00
Gregory Nutt
57191d15df
STM32 F7: Fix some errors in some macro definitions
2015-07-20 15:29:32 -06:00
Gregory Nutt
088d42a948
STM32 F7: Port the STM32 F7
2015-07-20 13:54:41 -06:00
Gregory Nutt
9737c6a0bc
STM32 F7 Ethernet: With these last changes, the STM32 F7 Ethernet driver is functional
2015-07-20 10:57:06 -06:00
Gregory Nutt
d406163a66
Refresh submodules; upated STM22F3 Ethernet debug output
2015-07-20 09:31:49 -06:00
Gregory Nutt
3fa40fd3c8
STM32 F7 Ethernet: RX/TX descriptors should be flushed to memory when they are first initialized
2015-07-20 07:05:35 -06:00
Gregory Nutt
bab4a5308a
STM32 F7 Ethernet: Add cache operations to make sure we have data coherency when accessing all DMA-related data
2015-07-19 17:04:43 -06:00
Gregory Nutt
2ce3c75264
STM32 F7 Ethernet: Add logic to align all DMA memory to the D-Cache line size
2015-07-19 16:35:25 -06:00
Gregory Nutt
c4d91c8c9f
Another FIX for gethostbyname if CONFIG_NETDB_DNSCLIENT is not defined
2015-07-19 14:45:34 -06:00
Gregory Nutt
a01ff4cb0b
STM32 F7: Fix a few of the many Ethernet compilation issues (still more)
2015-07-19 12:58:41 -06:00
Gregory Nutt
e5ea468d75
STM32 F7: Quick'n'dirty port of the STM32 F4 Ethernet driver. Does not yet even compile
2015-07-19 12:51:23 -06:00
Gregory Nutt
d748f1ac27
STM32 F7: Add Ethernet header file
2015-07-19 12:26:13 -06:00
Gregory Nutt
3150706ee4
STM32 F7: Add logic to enable I-/D-Cache, ITCM and DTCM
2015-07-19 10:43:26 -06:00
Gregory Nutt
be008484e7
STM32 F7: Port the STM32 F3 serial driver to the STM32 F7
2015-07-19 09:25:27 -06:00
Gregory Nutt
7241185e13
STM32 F7: Add DMA header files
2015-07-19 07:34:09 -06:00
Gregory Nutt
08c883b6e8
STM32 F7: Add low level serial console support
2015-07-18 16:24:02 -06:00
Gregory Nutt
d64058d36e
STM32 F7: Bring in other EXTI related files from STM32 F4
2015-07-18 16:00:00 -06:00
Gregory Nutt
5f9b0b3a2f
STM32 F7: Add USART/UART register definition
2015-07-18 15:58:59 -06:00
Gregory Nutt
12f04f8500
STM32 F7: Add heap initializatino logic; Clone the STM32 CCM allocator as the F7 DTCM allocator
2015-07-18 12:52:24 -06:00
Gregory Nutt
465d7fe8c5
STM32 F7: Add PWR register definitions
2015-07-18 11:55:35 -06:00
