sergiotarxz/nuttx
sergiotarxz/nuttx
1
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity
37,130 Commits 1 Branch 0 Tags
Commit Graph

652 Commits

Author SHA1 Message Date
Gregory Nutt
ac6581acec Changes from review of last PR 2016-11-07 08:28:39 -06:00
Gregory Nutt
261aef1e0d Merged in petekol/nuttxnsm (pull request #168) 
stm32f7 important usb fixes
 2016-11-07 14:08:00 +00:00
Lok Tep
d6315a3084 del stm32f74xx75xx_sdmmc.h 2016-11-07 13:12:52 +01:00
Lok Tep
b1b2008037 bad offset 2016-11-04 22:02:15 +01:00
Lok Tep
82f8802275 typo, missing ( 2016-11-04 21:58:31 +01:00
Gregory Nutt
d28181da10 arch: Disable priority inheritance on all semaphores used for signaling in all USB host drivers 2016-11-03 17:05:53 -06:00
Gregory Nutt
bb6bfa633e arch: Disable priority inheritance on all semaphores used for signaling in all SD card drivers 2016-11-03 15:13:27 -06:00
Gregory Nutt
8b07aa6f7c arch: Disable priority inheritance on all semaphores used for signaling in all SPI drivers 2016-11-03 14:51:44 -06:00
Gregory Nutt
e1cd9febbf arch: Disable priority inheritance on all semaphores used for signaling in all I2C/TWI drivers 2016-11-03 14:23:42 -06:00
David Sidrane
b344936c7b STM32F7:otgdev fixed typo 2016-10-28 23:20:53 +00:00
Gregory Nutt
76788040d5 ESP32: Add esp32_config.h 2016-10-26 15:45:03 -06:00
David Sidrane
314dd62dd5 stm32f76xx77xx_pinmap.h Missed one 2016-10-26 21:10:59 +00:00
David Sidrane
0bab23fb1b stm32_i2c.c Dejavu 2016-10-26 21:00:50 +00:00
Lok Tep
9e3479555d usb set value typo 2016-10-07 15:47:30 +02:00
Lok Tep
fd92f01f55 exact values for i2c clock 2016-10-07 15:12:46 +02:00
Lok Tep
a2e4c0e898 i2s rcc typo fix 2016-10-07 15:12:34 +02:00
Lok Tep
33cea5038f memory corruption, typo addr-value 2016-10-01 19:38:43 +02:00
Lok Tep
1cbd7a0e59 CONFIG_ARCH_IRQPRIO check 2016-09-30 16:00:18 +02:00
Lok Tep
7d7354f961 merge 2016-09-27 16:05:57 +02:00
Mateusz Szafoni
9742757f26 Remove GPIO_ETH_RMII_TX_CLK. TX_CLK is not present in RMII 2016-09-22 10:05:45 +02:00
Gregory Nutt
7f1a88e243 Pierre's assertion-avoidance change should also be applied to STM32 F7 and L4 2016-09-15 08:41:49 -06:00
David Sidrane
944902a24d F7 Usb Fix for FIFO loosing first word 2016-09-02 07:14:16 -10:00
David Sidrane
81ba54b650 Using uinfo 2016-09-02 03:50:26 -10:00
Gregory Nutt
bef7f5be23 STM32 F7: Remove duplicate call to pkt_input from Ethernet driver. 2016-08-30 08:04:18 -06:00
Gregory Nutt
6df28bc74e Make bit-order SPI H/W feature configurable for better error detection 2016-08-08 11:54:13 -06:00
Gregory Nutt
c3cfd37791 Fix cloned variable error in all SPI drivers 2016-08-08 11:04:01 -06:00
Gregory Nutt
2ae3953f9e STM32/EFM32: If any hardware feature other and LSBFIRST is selected, return -ENOSYS. 2016-08-08 10:37:28 -06:00
Gregory Nutt
7d4cb73bd6 STM32 and EFM32 SPI drivers adopted an incompatible conventions somewhere along the line. The set the number of bits to negative when calling SPI_SETBITS which had the magical side-effect of setting LSB first order of bit transmission. This is not only a hokey way to pass control information but is supported by no other SPI drivers. 
This change three things:  (1) It adds HWFEAT_LSBFIRST as a new H/W feature.  (2) It changes the implementations of SPI_SETBITS in the STM32 and EFM32 derivers so that negated bit numbers are simply errors and it adds the SPI_HWFEATURES method that can set the LSB bit order, and (3) It changes all calls with negative number of bits from all drivers: The number of bits is now always positive and SPI_HWFEATUREs is called with HWFEAT_LSBFIRST to set the bit order.
 2016-08-08 08:28:13 -06:00
Gregory Nutt
7473d3f859 Trivial changes from review of PR 2016-07-08 08:03:44 -06:00
Gregory Nutt
75e2f37dd2 Merged in david_s5/nuttx (pull request #89) 
stm32_serial.c edited online with Bitbucket
 2016-07-08 06:40:24 -06:00
David Sidrane
06036a5841 stm32_serial.c edited online with Bitbucket 2016-07-08 01:56:37 +00:00
David Sidrane
deb3e8143c STM32F7 - DMA working on SDMMC 2016-07-07 15:49:47 -10:00
David Sidrane
f8d3a872ee FIxed STM32F& DMA stm32_dmacapable 2016-07-07 15:49:21 -10:00
Gregory Nutt
6aa067e929 Mostly costmetic changes from review of last PR 2016-06-29 07:33:30 -06:00
David Sidrane
e58b67b946 Added STM32F7 DBGMCU 2016-06-28 17:23:44 -10:00
David Sidrane
efb2850b5f STM32F7 BBSRAM fixed (and formated) flags 2016-06-28 16:28:52 -10:00
Gregory Nutt
8323e97201 Merged in david_s5/nuttx/upstream_nucleo-144 (pull request #82) 
Upstream_nucleo 144
 2016-06-28 16:56:14 -06:00
David Sidrane
edca32f40c missing s 2016-06-28 12:44:17 -10:00
David Sidrane
35ca7eaf3a Removed STM32 porting vestiges 2016-06-28 12:43:39 -10:00
Gregory Nutt
2ed1295528 Cosmetic changes from review of last PR 2016-06-28 16:42:21 -06:00
David Sidrane
0af47a93ae STMF7xxx RTC 
Remove proxy #defines
 Ensure the LSE(ON) etal are set and remembered in
  a) A cold start (RTC_MAGIC invalid) of the RTC
  b) A warm start (RTC_MAGIC valid) of the RTC but a clock change.

The change was needed because in bench testing a merge of the latest's STM32  53ec3ca (and friends) it became apparent that the
Sequence of operation is wrong in the reset of the Backup Domain in the RCC code.  PWR is required before the Backup Domain
can be futzed with. !!!This Code should be tested on STM32 and if needed rippled to the STM32 families
 2016-06-28 12:13:36 -10:00
David Sidrane
1c93e48a09 Removed STM32 porting vestiges 2016-06-28 07:13:22 -10:00
David Sidrane
e0b7708afb Fix warning 2016-06-28 07:10:11 -10:00
Gregory Nutt
c74269ced6 Significantly stylistic changes required after review of last PR 2016-06-28 09:37:21 -06:00
David Sidrane
a4040759b0 Adding PWR, RTC, BBSRAM for stm32f7 2016-06-27 16:42:01 -10:00
David Sidrane
6c7ea4695a Syslog changes incoperated 2016-06-27 09:59:13 -10:00
David Sidrane
02b23358e5 Update Authors 2016-06-27 09:54:28 -10:00
Gregory Nutt
738510a52c Merged in david_s5/nuttx/upstream_nucleo-144 (pull request #75) 
Upstream_nucleo 144
 2016-06-27 12:30:53 -06:00
David Sidrane
047ea89c30 Fixed config for D1 only 2016-06-27 08:27:44 -10:00
Gregory Nutt
82bb42aa93 Trivial changes from review of last PR 2016-06-27 07:43:32 -06:00