Commit Graph

5 Commits

Author SHA1 Message Date
Gregory Nutt
5cdd038df2 Rename STM32F0L0 to STM32F0L0G0 since it now alsow supports the STM32G0 thanks to Mateusz Szafoni's contribution
Squashed commit of the following:

    arch/arm:  Rename include/stm32f0l0 and src/stm32f0l0 to stm32f0l0g0.

    Change all occurrences of lower-case stm32f0l0 to stm32f0l0g0.

    Change all occurrences of upper-case STM32F0L0 to STM32F0L0G0.
2019-05-27 08:16:24 -06:00
Gregory Nutt
a76e137ce2 Squashed commit of the following:
sched/init/nx_start.c:  Add support for CONFIG_BOARD_DRIVER_INITIALIZE.  If this option is selected then nx_start() will call a board-provided function board_driver_initialize() immediately after calling up_initialize().

    Rename CONFIG_BOARD_INITIALIZE to CONFIG_BOARD_LATE_INITIALIZE.

    Raname board_initialize() to board_late_initialize()
2019-02-18 15:32:00 -06:00
Mateusz Szafoni
4c601faf6f Brings in initial WIP support for the STML0. This initial commit is in pretty bad shape and, hence it it marked EXPERIMENTAL."
Squashed commit of the following:

    arch/arm/src/stm32f0l0:  Various changes for a clean compilation.  Still does not compile correctly due to missing FLASH latency definitions.

    arch/arm/src/stm32f0l0/hardware:  Add framework for the STM32 L0.  Currently set to same as the STM32F0.

    arch/arm/src/stm32f0l0/hardware:  Very fragmentary FLASH header register definitions for the STM32 L0.

    arch/arm/src/stm32f0l0:  Bring in DMA v1.  Cannot possibly be functionaly yet due to the limited number for M0 interrupts.

    arch/arm/src/stm32f0l0:  Add STM32 F0/L0 LSE and backup power domain controls.

    arch/arm/src/stm32f0l0/hardware/stm32l0_pwr.h:  Add STM32L0 PWR header file.

    arch/arm/include/stm32f0l0/chip.h: Clean up WIP chip header file.

    arch/arm/include/stm32f0l0/chip.h: WIP.

    arm/src/stm32f0l0: Resolve some small differences between F0 and L0 GPIO pin options.

    arch/arm/src/stm32f0l0: Better integrate STM32L0 header files.

    nuttx/arch/arm/include/stm32f0l0:  Add STM32L0 IRQ number definition file.

    arch/arm/src/stm32f0l0:  Add STM32L0 RCC driver.

    arch/arm/src/stm32f0l0/hardware:  Adds basic STM32L0 header files.

    arch/arm/src/stm32f0l0:  Add STM32L0 chip selections.

    configs/:  Hook new STM32L0 boards into the configuration system.

    configs: nucleo boards use as default ST LINK MCO as clock input from MCU and for this HSEBYP must be enabled

    configs: add basic support for nucleo-l073rz

    configs: add basic support for b-l072z-lrwan1
2018-12-19 12:36:35 -06:00
Gregory Nutt
b4ab6bc7f2 Squashed commit of the following:
arch/arm/src/stm32f0l0:  Some fixes for a clean build.  Still have a problem with lots of error messages coming from kconfig-mconf, but the configuation looks fine.  Sometimes kconfig errors are difficult to spot.  I would appreciate it anyone can spot the issue.

    arch/arm/src/stm32f0l0/hardware:  Rename the chip directory to hardware.  This will hopefully eliminate some problems that I have seen with the chip include paths not being unique in more complex configuartions.

    configs/nucleo-f072rb, configs/nucleo-f091rc, configs/stm32f051-discovery, and configs/stm32f072-discovery:  Update for all of the naming changes made in arch/arm/src/stm32f0l0

    arch/arm/include/stm32f0l0:  Rename stm32f0 to stm32f0l0 to make a speace for STM32 L0.  Rename files, functions and defines, removeing the f0_ from the names in order to make them MCU agnostic.

    arch/arm/src/stm32f0l0:  Rename stm32f0 to stm32f0l0 to make a speace for STM32 L0.  Rename files, functions and defines, removeing the f0_ from the names in order to make them MCU agnostic.
2018-12-16 10:50:16 -06:00
Gregory Nutt
b45472baf8 Nucleo-F072RB: Add board configuration 2017-04-18 10:07:03 -06:00