Gregory Nutt
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bad3ad58cb
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SAMA5: Add slow clock support
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2014-07-19 13:07:55 -06:00 |
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Gregory Nutt
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a5538e3431
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SAMA5D3/4: UPLL divisor to generate 48MHz for OHCI is different from the two families. No idea why.
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2014-07-03 12:28:11 -06:00 |
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Gregory Nutt
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083986e814
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SAMA5D4: USART peripheral clock appears to be MCK/2
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2014-06-20 11:40:36 -06:00 |
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Gregory Nutt
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85b0a1a544
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Costmetic fixes to README and some comments
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2014-03-30 11:34:18 -06:00 |
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Gregory Nutt
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aac2a6759d
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SAMA5D23 boards: When running out of SDRAM, need to query the PMC to determine operating frequency
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2014-03-29 17:51:06 -06:00 |
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