Commit Graph

52431 Commits

Author SHA1 Message Date
w2016561536
6b5ca79509 esp32s3/spi-dma: Fix spi dma transfer.
Fix esp32s3 spi dma transfer only transmit first byte and receive empty problem.
2024-01-23 04:05:52 -08:00
Lee Lup Yuen
62c358946d risc-v/bl808: Flush MMU Cache after updating SATP
Ox64 BL808 crashes with a Page Fault when we run `getprime` then `hello`. This is caused by the T-Head C906 MMU incorrectly accessing the MMU Page Tables of the Previous Process (`getprime`) while starting the New Process (`hello`).

To fix the problem, this PR flushes the MMU Cache whenever we point the MMU SATP Register to the New Page Tables. We execute 2 RISC-V Instructions that are specific to T-Head C906:

- DCACHE.IALL: Invalidate all Page Table Entries in the D-Cache
- SYNC.S: Ensure that all Cache Operations are completed

This is derived from the T-Head Errata for Linux Kernel. More details here: https://lupyuen.github.io/articles/mmu#appendix-flush-the-mmu-cache-for-t-head-c906

Modified Files:

- `arch/risc-v/src/common/riscv_mmu.h`: If needed, `mmu_write_satp()` calls `mmu_flush_cache()` (weak function) to flush the MMU Cache. (Like for T-Head C906)

- `arch/risc-v/src/bl808/bl808_mm_init.c`: Flush the MMU Cache for T-Head C906. Extend `mmuflags` from 32-bit to 64-bit to be consistent with `mmu_ln_setentry()`.

- `boards/risc-v/bl808/ox64/configs/nsh/defconfig`: Enable `ostest` in the Build Config. Update `CONFIG_BOARD_LOOPSPERMSEC` according to `calib_udelay`.
2024-01-23 01:25:20 -08:00
Yanfeng Liu
cba993df85 risc-v/cmake: add support to Ubuntu stock toolchain
Ubuntu stock toolchain `gcc-riscv64-unknown-elf` complains about
current CMake system (see issue#11573). This tries to fix it so
that both newer XPack and stock toolchains can be used with CMake.

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
2024-01-23 01:23:44 -08:00
Masayuki Ishikawa
78d22b997c boards: rv-virt: Fix the hello app crash with nsh64
Summary:
- I noticed that the hello app crashes due to
  https://github.com/apache/nuttx/pull/11576
- This is a tentative fix to avoid the crash

Impact:
- None

Testing:
- Tested with qemu-8.2.0

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2024-01-22 23:18:43 -08:00
David Sidrane
6c186b6084 stm32h7:serial make TX DMA busy when there are an outstanding transaction
If a TX DMA completion interrups a forground write.
    The TX DMA completion can start a dma_send and it will
    then followed by the forground write's dma_send
    stoping the,then in progress DMA.

    By atomicaly marking the tx dma busy, the forground
    write will not perform the dma_send, and will only
    enqueue the data. At the next TX dma completion any
    data pending in the tx queue will be sent
2024-01-22 06:06:01 -08:00
ThomasNS
1c28bf2ed1 fix typo: it is P4.0 and not P0.4 2024-01-22 05:46:33 -08:00
YAMAMOTO Takashi
81996900db fix build with CONFIG_SCHED_INSTRUMENTATION_FUNCTION 2024-01-22 19:30:40 +08:00
dependabot[bot]
2ec36fa7bd build(deps): bump actions/cache from 3 to 4
Bumps [actions/cache](https://github.com/actions/cache) from 3 to 4.
- [Release notes](https://github.com/actions/cache/releases)
- [Changelog](https://github.com/actions/cache/blob/main/RELEASES.md)
- [Commits](https://github.com/actions/cache/compare/v3...v4)

---
updated-dependencies:
- dependency-name: actions/cache
  dependency-type: direct:production
  update-type: version-update:semver-major
...

Signed-off-by: dependabot[bot] <support@github.com>
2024-01-22 01:42:03 -08:00
Yanfeng Liu
b46ee08230 rv-virt/configs: avoid build errors
- disable NSH_SYMTAB to avoid build errors with cmake.
- enable LIBM to avoid build errors with Ubuntu stock
  gcc-riscv64-unknown-elf toolchain.
- use HELLO=y for easy use within qemu console.

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
2024-01-22 08:18:04 +01:00
Tiago Medicci Serrano
282feec9a3 esp32-devkitc/mcuboot_update_agent: Update defconfig
Espressif's MCUboot should be built from sources.
2024-01-21 06:33:25 -08:00
Tiago Medicci Serrano
0ecc3aaad2 esp32: Explicitly fail on boot-up for unsupported ESP32 versions.
ESP32 is supported on NuttX starting from chip revision 3.0. This,
however, didn't prevent the user from using older chip revisions,
which caused unexpected behaviors. This commit checks chip revision
before finishing booting NuttX.
2024-01-21 06:33:25 -08:00
Tiago Medicci Serrano
2954551ef6 esp32/hardware/esp32_efuse.h: Update macros for registers.
This commit is intended to update the EFUSE's register content and
update related configs:
 - Remove duplicated configs from `esp32_soc.h`;
 - Add missing header files from APB registers;
 - Add missing macro definitions from EFUSE;
 - Update related code to use the new macros;
2024-01-21 06:33:25 -08:00
Tiago Medicci Serrano
8752e6d863 esp32/hardware: Rename efuse_reg.h to esp32_efuse.h. 2024-01-21 06:33:25 -08:00
fangxinyong
5d40882d4c Documentation: update doc for etc romfs
as apache/nuttx#11498, need update documentation for etc romfs,
that mount etc romfs from nsh to sched/init.
2024-01-21 06:11:46 -08:00
raiden00pl
2ff700de92 Documentation: migrate x86_64 readme to rst 2024-01-21 06:11:18 -08:00
Takeyoshi Kikuchi
bca8df7d65 arm: sama5: sam_ehci: fix transfer cancellation process.
The logic of the conditional expression that determines whether
the QH is a target QH or not is reversed in the process of canceling
a transfer in INPROGRESS state.

Therefore, the QH in INPROGRESS state is not released and subsequent
communication is not successful.

Checked with CDC-ACM driver and cu command.

Signed-off-by: Takeyoshi Kikuchi <kikuchi@centurysys.co.jp>
2024-01-20 19:54:26 -08:00
Xiang Xiao
2ab9a848a0 fs/romfs: Move rn_child/rn_count before rn_namesize
which could save 4 bytes for each node

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2024-01-20 09:27:50 -03:00
Yanfeng Liu
27137113f1 risc-v/k230: update documents
added brief features list for K230 chip
updated CanMV230 board docs for NUTTSBI config usage

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
2024-01-19 19:33:21 -08:00
Yanfeng Liu
4c41d84d21 tools/export: add hello_zig support in kernel mode for linux host
Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
2024-01-19 01:09:46 -08:00
Yanfeng Liu
c3aab93e5f usb: document revision and typo fixing
This slightly revised the USB host documentation and fixed typos
encountered in the document and some source files.

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
2024-01-18 21:09:20 -08:00
Dong Heng
85238fa4de xtensa/esp32s3: Fix USB pull-up and pull-down issue
ESP32-S3 USB OTG device can't call function esp32s3_pullup to notify USB host that it connects or disconnects.
2024-01-18 17:53:16 -08:00
ThomasNS
e966fff597 add GPIO_U1C0_SCLKOUT_3 P4.0 for spi2 on xm4 2024-01-18 17:49:56 -08:00
chao an
02acf2d2a4 risc-v/cmake: set nostdlib to c compiler
To avoid build break:

ld: riscv-none-elf/lib/rv64imafdc_zicsr/lp64d/crt0.o: in function `.L0 ':
(.text+0x8): undefined reference to `__bss_start'
ld: (.text+0x10): undefined reference to `_end'
ld: (.text+0x36): undefined reference to `main'
collect2: error: ld returned 1 exit status

Signed-off-by: chao an <anchao@lixiang.com>
2024-01-18 09:53:53 +01:00
chao an
2fd95611cb risc-v/cmake: configurable vendor ISA extensions
merge below commit into cmake:

1. risc-v/toolchain: configurable vendor ISA extensions

This option allows the platform to enable some vendor-customized ISA extensions,
E.g OpenHW, SiFive, T-Head.

SiFive Intelligence Extensions:
    SiFive Vector Coprocessor Interface(VCIX): xsfvcp
    SiFive FP32-to-int8 Ranged Clip Instructions: Xsfvfnrclipxfqf
    SiFive Matrix Multiply Accumulate Instructions: Xsfvfwmaccqqq
    SiFive Int8 Matrix Multiplication Instructions: XSFvqmaccqoq
Command Line:
    xsfvcp0p1_xsfvfnrclipxfqf0p1_xsfvfwmaccqqq0p1_xsfvqmaccqoq0p1

2. "V" Standard Extension for Vector Operations
3. "Q" Standard Extension for Quad-Precision Floating-Point

Signed-off-by: chao an <anchao@lixiang.com>
2024-01-18 09:53:53 +01:00
Lwazi Dube
1c0299b687 drivers/usbhost: Update USB bluetooth driver
Miscellaneous changes addressing feedback from xiaoxiang781216.
2024-01-17 17:49:02 -08:00
w2016561536
829ec6d5e4 esp32s3/pwm: Fix pwm output
1. Fix pwm output always low problem.
2. Add multi channel support in defconfig
2024-01-17 22:42:08 -03:00
Yanfeng Liu
1e9434e2db arch/: remove duplicated task exit logs
Newly added logging in `sched/task_exit.c` obsoletes the existing
ones in `arch/up_exit()`, thus remove the latter to reduce duplications.

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
2024-01-17 09:18:17 -08:00
Yanfeng Liu
87c9a0ee76 risc-v/k230: add NUTTSBI based kernel build support
Previously k230 kernel build needs OpenSBI wrapping for use on
target, thus leading to larger program and memory overheads.
This patch adds alternative small overhead kernel build support.

Changes:

- in arch/risc-v/src/k230:
  - k230_head.S          entrance renamed for sake of NUTTSBI
  - k230_irq.c           add M-mode handling for NUTTSBI case
  - k230_mm_init.c       add L3 table for smaller RAM case
  - hardware/k230_plic.h add PLIC_CTRL definition
  - Make.defs            use CHIP_ASRCS to fix entrance selection
- in boards/risc-v/canmv230/scripts:
  - Make.defs            add support for NUTTSBI case

Additions:

- in boards/riscv/canmv230/:
  - scripts/ld-nuttsbi.script  link script for NUTTSBI case
  - configs/nsbi/defconfig     config for NUTTSBI case

The artifact nuttx.bin from this configuration can be used directly
on target as OpenSBI wrapping is not needed.

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>

fix typo
2024-01-17 10:31:29 -03:00
w2016561536
6a0eeb1b3e esp32s3/spi: Add SPI bus init in bringup and fix SPI bus 2 and 3 conflict
1. Add spi bus init in esp32s3_bringup.c
2. Fix IOMUX conflict between spi bus 2 and 3
3. Add spi defconfig
4. Follow the standard of NuttX
2024-01-17 09:29:20 -03:00
Zhe Weng
b8e0423b74 libcxx: Fix CMake compile with correct CMAKE_CXX_STANDARD
It seems libcxx needs C++20 from 12.0.0 to 17.0.6: 3b625060fc

But we're setting CMAKE_CXX_STANDARD to 17, errors on my side:

nuttx/libs/libxx/libcxx/src/include/to_chars_floating_point.h:122:46: error: ‘bit_cast’ is not a member of ‘std’
  122 |     const _Uint_type _Uint_value    = _VSTD::bit_cast<_Uint_type>(_Value);
      |                                              ^~~~~~~~
nuttx/libs/libxx/libcxx/src/memory_resource_init_helper.h:2:8: error: ‘constinit’ does not name a type
    2 | static constinit ResourceInitHelper res_init _LIBCPP_INIT_PRIORITY_MAX;
      |        ^~~~~~~~~
nuttx/libs/libxx/libcxx/src/memory_resource_init_helper.h:2:8: note: C++20 ‘constinit’ only available with ‘-std=c++20’ or ‘-std=gnu++20’

Signed-off-by: Zhe Weng <wengzhe@xiaomi.com>
2024-01-16 21:54:30 -08:00
Lwazi Dube
1349dcfc1f drivers/usbhost: Add a USB bluetooth driver.
This change adds support for the USB Transport Layer as described
in the bluetooth spec. Isochronous endpoints are not yet supported.
Because of limitations in the NuttX bluetooth stack, only one USB
device can be used. This driver will only allow one USB dongle to
use bluetooth.

A Laird USB BT4.2 dongle (from Mouser) was used for testing:
M/N BT851 1.0 1829, FCC ID:SQGBT850
lsusb: 04b4:f901 Cypress Semiconductor Corp. CYW20704A2

The following commands were used to test from the nsh prompt:
bt bnep0 scan start
bt bnep0 scan stop
bt bnep0 scan get
bt bnep0 info

The Linux gatttool was used to connect over wireless.

With the BDAddr found by "bt bnep0 info", start gatttool using:
gatttool -b BDAddr -I

Connect to the device using:
connect

Read the device name using the GAP device name UUID:
char-read-uuid 2a00

Part of the response is:
value: 41 70 61 63 68 65 20 4e 75 74 74 58
which is the string "Apache NuttX"
2024-01-16 16:02:15 +01:00
wangyongrong
7508a10e20 rptun: Strip rpmsg and rptun
nuttx/driver/rpmsg: new folder, extract common rpmsg api in rptun.c to rpmsg.c.
rpmsg provide rpmsg_ops to each backend for specific implementation.

Signed-off-by: wangyongrong <wangyongrong@xiaomi.com>
2024-01-16 15:58:32 +01:00
chao an
95fcc286a2 risc-v/toolchain: configurable vendor ISA extensions
This option allows the platform to enable some vendor-customized ISA extensions,
E.g OpenHW, SiFive, T-Head.

SiFive Intelligence Extensions:
    SiFive Vector Coprocessor Interface(VCIX): xsfvcp
    SiFive FP32-to-int8 Ranged Clip Instructions: Xsfvfnrclipxfqf
    SiFive Matrix Multiply Accumulate Instructions: Xsfvfwmaccqqq
    SiFive Int8 Matrix Multiplication Instructions: XSFvqmaccqoq
Command Line:
    xsfvcp0p1_xsfvfnrclipxfqf0p1_xsfvfwmaccqqq0p1_xsfvqmaccqoq0p1

Signed-off-by: chao an <anchao@lixiang.com>
2024-01-15 22:31:39 -08:00
chao an
ce201bba61 risc-v/kconfig: move ARCH_HAVE_MMU into mmu type define
Signed-off-by: chao an <anchao@lixiang.com>
2024-01-15 22:31:39 -08:00
chao an
52e99bc66b risc-v/toolchain: move zicsr/zifencei extension into Kconfig
Signed-off-by: chao an <anchao@lixiang.com>
2024-01-15 22:31:39 -08:00
chao an
f95bbb2949 risc-v/toolchain: add "V" Standard Extension into command line
"V" Standard Extension for Vector Operations

Signed-off-by: chao an <anchao@lixiang.com>
2024-01-15 22:31:39 -08:00
chao an
0cb09ce0ab sim/usbdev: refresh defconfig to fix ci break
Signed-off-by: chao an <anchao@lixiang.com>
2024-01-15 22:31:39 -08:00
chao an
3ee4227668 risc-v/toolchain: add "Q" Standard Extension into command line
"Q" Standard Extension for Quad-Precision Floating-Point

Signed-off-by: chao an <anchao@lixiang.com>
2024-01-15 22:31:39 -08:00
chao an
90f24ec29d arch/risc-v: add ARCH_QPFPU for Quad-Precision Floating-Point
new options to enable toolchain support for quadruple precision
(128 bits or 16 bytes) floating point if both the toolchain and
the hardware support it.

Signed-off-by: chao an <anchao@lixiang.com>
2024-01-15 22:31:39 -08:00
Xiang Xiao
d2c4de6167 board: Add CONFIG_LIBC_EXECFUNCS and CONFIG_PSEUDOTERM to adb config
required by https://github.com/apache/nuttx-apps/pull/2257

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2024-01-15 17:14:51 +08:00
chao an
45cca933f8 CMake: arm/armv8-r: init armv8-r cmake build
Test cmake build on aarch32 fvp:
$ cmake -B build -DBOARD_CONFIG=fvp-armv8r-aarch32/nsh -GNinja
$ cmake --build build

Signed-off-by: chao an <anchao@lixiang.com>
2024-01-15 00:46:52 -08:00
chao an
7c89f943c0 armv8-r/perf: enable perf count only ARCH_PERF_EVENTS is enabled
Signed-off-by: chao an <anchao@lixiang.com>
2024-01-15 00:46:52 -08:00
wangyongrong
df147406db rptun_ping: decoupling rptun ping and rptun.
ping is not only rptun support, so move it to public part.

Signed-off-by: wangyongrong <wangyongrong@xiaomi.com>
2024-01-14 23:06:51 -08:00
wangyongrong
11cefd087a rptun ping: decoupling rptun ping and rptun virtio device
Signed-off-by: wangyongrong <wangyongrong@xiaomi.com>
2024-01-14 23:06:51 -08:00
Yanfeng Liu
f280c33311 sched/logging: add task activation/exit logs
Task activation/exit logs are helpful for device bringup,
especially when user space nsh prompt doesn't show up.

Putting them here will allow cleaning of logs in multiple
up_exit() functions  later.

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
2024-01-14 23:04:42 -08:00
Yanfeng Liu
3c327efd2f docs/comments: fix some typos
Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
2024-01-15 13:22:13 +08:00
Huang Qi
fe5ca39a79 libc.csv: Fix qsort signature with unexpected quotation mark
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2024-01-14 02:17:22 -08:00
Lwazi Dube
2dac5e1b6a bluetooth: Prevent btsak from repeatedly showing the same error. 2024-01-14 02:16:48 -08:00
Takeyoshi Kikuchi
f01e395b1c fs: partition: fs_mbr: fix for MBR block count calculation.
When the MBR partition size exceeds 2 GiB, a 32-bit wrap-around occurs,
causing an error in the block count calculation.

* wrong
 brw-rw-rw- 5150605312 mmcblk0
 brw-rw-rw-  629145600 mmcblk0p1
 brw-rw-rw-  225443840 mmcblk0p2 <--

* fixed
 brw-rw-rw- 5150605312 mmcblk0
 brw-rw-rw-  629145600 mmcblk0p1
 brw-rw-rw- 4520411136 mmcblk0p2 <--

Signed-off-by: Takeyoshi Kikuchi <kikuchi@centurysys.co.jp>
2024-01-14 01:29:24 -08:00
Yanfeng Liu
78e8c0dea5 risc-v/nuttsbi: add device specific initialization hook
Some devices have special preparations before entering S-mode, thus
a hook is needed from NUTTSBI to give them the chance.

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
2024-01-14 01:28:10 -08:00