Commit Graph

98 Commits

Author SHA1 Message Date
Mateusz Szafoni
ca4ef377fb Merged in raiden00/nuttx_pe (pull request #776)
arch/arm/include/stm32/chip.h: fix typo

Approved-by: GregoryN <gnutt@nuttx.org>
2018-12-06 17:52:11 +00:00
Mateusz Szafoni
428b625428 Merged in raiden00/nuttx_pe (pull request #773)
arch/arm/include/stm32/chip.h: remove redundant STM32 family definitions. It is already done in arch/arm/src/stm32/Kconfig

Approved-by: GregoryN <gnutt@nuttx.org>
2018-12-05 11:46:36 +00:00
Dave Marples
d0cda60442 In the current implementation we only use very high priority interrupts (levels 0, 0x10 and 0x20 in CORTEX-M speak) but that means there are loads of lower priority ones that are effectively unused. I have *not* changed the semantics of these levels but have 'shifted' them to be based around the midpoint of the available interrupts (0x80) rather than at the top end....that allows for interrupts to be defined above (or, indeed, below) them as needed by the application. This should have no functional effect on existing code but adds in a clean capability to define higher priority interrupts. 2018-12-03 17:41:59 -06:00
Mateusz Szafoni
0a288ac3db Merged in raiden00/nuttx_pe (pull request #769)
configs: add support for nucleo-f103rb, nucleo-f207zg and nucleo-l152re

Approved-by: GregoryN <gnutt@nuttx.org>
2018-12-01 12:22:05 +00:00
Petteri Aimonen
ec6c7839d3 Merged in paimonen/nuttx/pullreq_STM32_NDAC_fix (pull request #752)
NuttX: STM32F407VG has only one DAC

NDAC=2 causes compilation error when trying to use e.g. STM32_DAC1_CR macro.

Approved-by: GregoryN <gnutt@nuttx.org>
2018-11-09 12:15:57 +00:00
Mateusz Szafoni
2a4ed884b5 Merged in raiden00/nuttx_pe (pull request #743)
arch/arm/stm32: add support for STM32F303xD/E; configs: add basic support for nucleo-f303ze

Approved-by: GregoryN <gnutt@nuttx.org>
2018-10-28 16:39:56 +00:00
raiden00pl
342cbe58dd Merged in raiden00/nuttx_pe (pull request #732)
configs: add support for nucleo-f302r8 board

Approved-by: GregoryN <gnutt@nuttx.org>
2018-10-05 13:02:49 +00:00
Gregory Nutt
8bd9cfe038 Squashed commit of the following:
arch/arm:  Remove support for CONFIG_ARMV7M_CMNVECTOR.  It is now the only vector support available.  Also remove CONFIG_HAVE_CMNVECTOR.  That no longer signifies anything."
    arch/arm/src/stm32:  This commit removes support for the dedicated vector handling from the STM32 architecture support. Only common vectors are now supported.
2018-06-20 12:30:37 -06:00
Gregory Nutt
ab5244e855 arch/arm/src/stm32: While we are at it and the differences are fresh in mind, add support for the rest of the STM32F401 family. 2018-03-05 17:36:08 -06:00
Gregory Nutt
33adf2c64d arch/arm/src/stm32: Add support for the STM32F401xB and STM32F401xC families. 2018-03-05 13:45:01 -06:00
raiden00pl
01dc86da3d stm32/chip.h: minor fixes for STM32F334 2018-01-03 19:07:51 +01:00
Gregory Nutt
08fa834a6a arch/arm/include/stm32 and stm32f7: Remove ltdc.h and dma2d.h. Those header files in that location permitted inclusion into application space logic and, hence, facilitated and encouraged calling into the OS and violating the portable POSIX OS interface. The definitions in those header files were move the appropriate location in the counterpart, architecture specific files at arch/arm/src/stm32 and stm32f7 dma2d.h and ltdc.h.
configs/stm32f429i-disco/ltdc:  This configuration has been deleted because it violated the portable POSIX OS interface.  It used apps/examples/ltdc and include ltdc.h and dma2d.h which were also removed for the same reason.
2017-11-06 12:22:48 -06:00
Juha Niskanen
37867ae3b9 chip.h edited online with Bitbucket: correct some STM32_NDAC 2017-08-21 07:30:58 +00:00
raiden00pl
0bed6ac8b4 STM32F33: correct STM32_NDAC 2017-08-20 20:07:50 +02:00
Gregory Nutt
47be509d79 Rename CONFIG_STM32_STM32F40XX to CONFIG_STM32_STM32FXXXX since it is used by F4 parts other than F40x 2017-07-06 10:20:14 -06:00
Gwenhael Goavec-Merou
02535be36a STM32F410. Add support for STM32Fr10. STM32F410 is a version of STM32F4 with 32 KB of RAM and 62 or 128 KB of flash. 2017-05-13 08:40:09 -06:00
Gregory Nutt
0de294a586 Fix lots of occurrences of 'the the', 'the there', 'the these', 'the then', 'the they. 2017-05-11 13:35:56 -06:00
Juha Niskanen
9d0ecedf7d Add support for STM32L152CC, STM32L152RC and STM32L152VC. Update some bits and comments for other STM32L1 parts in chip.h 2017-04-20 06:30:26 -06:00
Juha Niskanen
e320e5c100 STM32: add STM32L162VE to chip.h 2017-04-03 07:59:11 -06:00
Gregory Nutt
ac6e552ff7 Fixes for coding standard: '*' needs to 'snuggle' with following variable name 2017-02-28 18:37:44 -06:00
Gregory Nutt
2e0ffc0ea3 Update some comments. 2017-02-26 09:15:57 -06:00
raiden00pl
3175b74428 Add basic support for the STM32F334 2017-02-26 12:39:44 +01:00
Paul A. Patience
30bbeb6c1f STM32: Forgot to update chip.h for STM32F303x[BC]'s 4 ADCs 2016-12-08 16:31:39 -05:00
Marc Rechte
483f012600 Initial implemention of the STM32 F37xx SDADC module. There are also changes to ADC, DAC modules. SDADC has only been tested in DMA mode and does not support external TIMER triggers. This is a work in progress. 2016-10-25 14:14:10 -06:00
Gregory Nutt
1cdc746726 Rename CONFIG_DEBUG to CONFIG_DEBUG_FEATURES 2016-06-11 14:14:08 -06:00
Konstantin Berezenko
b9e7b4ed70 Correct the can2 rx irq number for stm32f10xx chips 2016-06-10 10:52:58 -07:00
Konstantin Berezenko
3fc7b6f0e5 Add stm32f105r support 2016-06-06 12:52:41 -07:00
Paul A. Patience
56b018d5db STM32: Fix typo 2016-06-06 12:02:11 -04:00
Konstantin Berezenko
5c6cd17d46 Add support for SPI 4 and 5 on stm32f411 chips 2016-05-27 11:08:18 -07:00
Gregory Nutt
4a63a7760a STM32: Hook 1-Wire driver into the build system 2016-05-25 12:31:32 -06:00
Konstantin Berezenko
a2253cdd3e Add basic configuration for stm32f411e-disco board with STM32F411VE chip 2016-05-20 16:38:25 -07:00
Paul A. Patience
099990f3da STM32: Add support for STM32F46xxx 2016-03-01 12:18:07 -05:00
Gregory Nutt
83bc1c97c3 Rename irqsave() and irqrestore() to up_irq_save() and up_irq_restore() 2016-02-14 16:11:25 -06:00
Gregory Nutt
a6d6c430d9 Changes to last merge from review for compliance to coding standards 2015-11-17 21:10:17 -06:00
Marwan Ragab
4999c14085 Added implementation to get 96-bit stm32 unique id 2015-11-17 21:34:41 -05:00
Gregory Nutt
2b078150e8 Merged in marten_svanfeldt/nuttx-arch-public/for_upstream/stm32f429n (pull request #20)
Add support for STM32F429N (TFBGA) chip
2015-10-22 18:19:52 +08:00
Marten Svanfeldt
4d879a33ee Add support for STM32F429N (TFBGA) chip
Signed-off-by: Marten Svanfeldt <marten@intuitiveaerial.com>
2015-10-21 10:30:57 +08:00
Gregory Nutt
9caf33e13b Standardize the width of all comment boxes in C header files 2015-10-03 07:28:30 -06:00
Gregory Nutt
cfd41bdb30 STM32: Eliminate some warnings 2015-09-07 16:25:54 -06:00
Paul A. Patience
c800841632 Added definitions for STM32F303K6, STM32F303K8, STM32F303C6,
STM32F303C8, STM32F303RD, and STM32F303RE devices.
2015-08-17 14:00:49 -04:00
David Sidrane
778c630c6b Add support for the STM32446. From David Sidrane 2015-07-22 07:26:53 -06:00
David Sidrane
e36ca25c5c STM32: Fix incorrect naming of inclusion guard in IRQ header files 2015-07-21 12:25:15 -06:00
David Sidrane
e7d039ac2b STM32: Fix incorrect naming of inclusion guard in IRQ header files 2015-07-21 11:30:45 -06:00
David Sidrane
5e1a50c93e STM32: Oops. Some STM32 F7 edits accidentally went into STM32 files ;(. Fixed by David Sidrane 2015-07-18 11:05:44 -06:00
Gregory Nutt
1ed5f5a3ed STM32: Move STM32F42xxx IRQ definitions out of stm32f40xxx_irq.h into their own stm32f42xxx_irq.h header file 2015-07-15 13:52:20 -06:00
Gregory Nutt
29136e51cc Clean up and review of header files for conformance to standards 2015-06-12 19:26:01 -06:00
Gregory Nutt
0c59dd2888 Fix a missing # in the previous commit 2015-05-31 13:26:13 -06:00
Gregory Nutt
4e811aa54d Add basic support for the STM32F205RG. From SourceForge Ticket 40 (anonymous). 2015-05-31 13:06:26 -06:00
Gregory Nutt
aaaa8f2e9d Adds support for STM32F302K8 and STM32F302K6. From Ben Dyer via PX4/David Sidrane. 2015-05-08 14:10:55 -06:00
Gregory Nutt
7a6a5b7bd0 Defines a second interface for the dma2d controller. Controlling both LTDC and DMA2D was unpractical from the programmers view because both controllers are to different. LTDC only controls the display visibility but the DMA2D controller changes the content of the frame buffer (buffer of the layer).
The main features are:

1. DMA2D interface
   Supports the nuttx pixel formats:
   - FB_FMT_RGB8
   - FB_FMT_RGB24
   - FB_FMT_RGB16_565
   Dynamic layer allocation during runtime for the supported formats
   - The number of allocatable layer can be configured.
   Supported dma2d operation:
   - blit (Copy content from source to destination layer) also works with
     selectable area.
   - blend (Blend two layer and copy the result to a destination layer wich can
     be a third layer or one of the source layer) also works with selectable
     area.
   - fillarea (Fill a defined area of the whole layer with a specific color)

As a result of that the dma2d controller can't transfer data from the core coupled memory, CCM is disabled but usable by the ccm allocator. Currently the ccm allocator is used for allocating the layer structurei only. For the dma memory (layers frame buffer) memory is allocated from heap 2 and 3.

2. LTDC interface

   I have changed the api for the currently non implemented operations:
   - blit (Copy content from a dma2d layer to an ltdc layer) also works with
     selectable area.
   - blend (Blend two dma2d layer and copy the result to a destination ltdc
     layer) also  works with selectable area.

     Note! ltdc layer is a layer referenced by the ltdc interface. dma2d layer
     is a layer referenced by the dma2d interface.

     One of the most important questions for me was, How can i flexible use an
     ltdc layer with the dma2d interface, e.g. as source layer for dma2d
     operations?
     Get the layer id of the related dma2d layer by a special flag when using
     getlid() function of the ltdc interface and use the layer id to reference
     the specific dma2d layer by the dma2d interface.

     The ltdc coupled dma2d layers are predefined and can't be dynamically
     allocated of freed. They use the same frame buffer memory and the same
     color lookup table.

   Changes:
   - layer internal format of the clut table
   - interrupt handling for register reload (vertical vblank) instead using
     waiting loop
   - small fixes and refactoring

From Marco Krahl.
2015-04-16 09:11:52 -06:00