Commit Graph

5 Commits

Author SHA1 Message Date
Tiago Medicci Serrano
d3ffeb40a7 libc/machine/xtensa: make longjmp safe against context switch
In order to turn longjmp context-switch safe, it's necessary
to disable interrupts before modifying windowbase and windowstart.
Otherwise, after a context switch, windowstart and windowbase
would be different, leading to a wrongly set windowstart bit due to
longjmp writing it based on the windowbase before the context switch.
This corrupts the registers at the next window overflow reaching
that wrongly set bit.

*Background:*
This PR is related to an issue first observed on ESP-IDF
https://github.com/espressif/esp-idf/issues/5229 and it was, then,
checked on NuttX using a test application.

*The test application:*
To check if the problem affects ESP32, ESP32-S2 and ESP32-S3 on
NuttX, it was created an application based on:
https://en.cppreference.com/w/c/program/longjmp

The application creates 16 tasks (`#define NUMBER_OF_TASKS  16`)
that implements the following daemon:

```
static int setjmp_longjmp_daemon(int argc, char *argv[])
{
  for (int i = 0; i < NUMBER_OF_TASKS * 2; i++)
    {
      jmp_buf env;

      volatile int count = 0;
      if (setjmp(env) != UINT16_MAX)
        {
          foo(&env, ++count);
        }
    }

  sem_post(&g_sem);

  return EXIT_SUCCESS;
}
```

The main function also initializes a semaphore to avoid application
exiting before tasks return successfully:

```
  sem_init(&g_sem, 0, -NUMBER_OF_TASKS);
```

Finally, the round-robin interval was lowered to 1ms to raise the
chances of the longjmp being interrupted by a context switch
(`CONFIG_RR_INTERVAL=1).

This setup was able to reproduce the problem prior to this patch
being applied.
2022-11-22 19:34:44 +01:00
Gustavo Henrique Nihei
024364ebbd xtensa/esp32s3: Add support for GPIO pin interrupts
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-03-23 07:23:51 +09:00
Gustavo Henrique Nihei
77944ceb42 xtensa/esp32s3: Clean up and improve GPIO driver interface
Also fix an inconsistenct regarding the ESP32S3_NGPIOS macro. Although
correctly defining the number of available GPIOs in ESP32-S3, it was
erroneously being used for verifying the pin range.

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-03-19 01:08:27 +02:00
zhuyanlin
fc9791c269 xtensa:esp32s3: setup software interrupt as swi interrupt.
Enable and setup software interrupt.

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2022-02-24 00:06:43 +01:00
Gustavo Henrique Nihei
b0d24f53c4 xtensa: Add initial support for ESP32-S3
Co-authored-by: Alan Carvalho de Assis <alan.carvalho@espressif.com>
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-01-27 13:46:50 -03:00