Commit Graph

23 Commits

Author SHA1 Message Date
Abdelatif Guettouche
cd0f64d779 xtensa/irq.h: Add a macro to convert to an IRQ from a peripheral ID.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-08-18 10:49:58 -03:00
Alan C. Assis
0a0a034a3f esp32: replace EPS32 typo with ESP32 2021-04-29 18:03:05 -03:00
Alin Jerpelea
778f050102 arch: xtensa: Author Gregory Nutt: update licenses to Apache
Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-02 03:14:31 -05:00
Dong Heng
b2f5031e96 xtensa/esp32: Refactor ESP32 WiFi driver to support station and softAP coexistence 2021-03-16 10:20:59 -03:00
Sara Souza
0faf861256 xtensa/esp32: Added Timer Support 2020-10-07 14:12:22 -03:00
Abdelatif Guettouche
769d68a762 arch/xtensa: Fix some typos and correct some comments.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-09-30 13:55:28 -03:00
Alan C. Assis
79a3fd1932 ESP32: Add driver support to SPI Master and Slave
This driver was implemented by Dong Heng <dongheng@espressif.com>
and modified to fix coding style by Alan Carvalho de Assis.
2020-07-19 21:26:58 +01:00
Nathan Hartman
679b4fbee2 arch: Fix included directed -> included directly
This typo had been copied and pasted into numerous irq and syscall
headers.
2020-04-05 22:31:15 +01:00
YAMAMOTO Takashi
7774cdd7aa Appease many of nxstyle errors for esp32 related files
I skipped the following files because they were not simple.
I'll create separate PRs.

    arch/xtensa/src/esp32/esp32_cpustart.c
    arch/xtensa/src/common/xtensa_abi.h
    boards/xtensa/esp32/esp32-core/include/board.h

Also, I skipped the following files and directories because
they looked too huge and/or foreign.

    arch/xtensa/include/esp32/tie.h
    arch/xtensa/include/xtensa/xtensa_corebits.h
    arch/xtensa/src/esp32/hardware/
    arch/xtensa/include/esp32/tie-asm.h
    arch/xtensa/include/esp32/core-isa.h
    arch/xtensa/include/xtensa/core.h

I also fixed a few "is is" style typos when unwrapping long lines.
2020-03-12 07:45:44 -06:00
Xiang Xiao
bd4e8e19d3 Run codespell -w against all files
and fix the wrong correction
2020-02-22 14:45:07 -06:00
Gregory Nutt
cdd8dc72a5 Xtensa ESP32: Basically a redesign of the interrupt dispatch logic. 2016-12-16 15:36:52 -06:00
Gregory Nutt
b5e979d58f ESP32: Fix a couple of bugs associated with handling of CPU interrupts. 2016-12-14 13:31:44 -06:00
Gregory Nutt
a8e3f79494 Xtensa/ESP32: Add User Exception handler 2016-10-31 12:04:52 -06:00
Gregory Nutt
85ed3dae9a Update some compilation issues 2016-10-30 15:38:51 -06:00
Gregory Nutt
fdede8099b Xtensa/ESP32: Add Level1 handler, panic handler, remove EXECHOOKS. 2016-10-30 10:57:57 -06:00
Gregory Nutt
650757bbf0 ESP32: Add GPIO support 2016-10-26 12:11:24 -06:00
Gregory Nutt
b8462d3e04 ESP32: Need to take priority into account when allocating CPU interrupts 2016-10-25 16:27:58 -06:00
Gregory Nutt
2a59205ffa ESP32: Add CPU interrupt managmement logic; improve level interrupt decoding. 2016-10-25 12:02:53 -06:00
Gregory Nutt
1dabbd8489 Costmetic changes 2016-10-24 16:18:30 -06:00
Gregory Nutt
1ea22b680d Xtensa: Add timer dispatch logic 2016-10-21 13:23:28 -06:00
Gregory Nutt
9e1600b7d3 Xtensa: Trivial interrupt-related changes 2016-10-20 12:56:35 -06:00
Gregory Nutt
6f35ced002 ESP32: Add peripheral interrupt IRQ numbers 2016-10-15 08:39:15 -06:00
Gregory Nutt
852330876b arch/xtensa: A little more ESP32 configuration logic 2016-10-12 14:50:28 -06:00