Gregory Nutt
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a2ee73235d
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Cosmetic changed, updated README files, improved comments
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2014-08-10 13:11:31 -06:00 |
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Gregory Nutt
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77d49f50e0
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Don't try to return time remaining if the timespec pointer is NULL
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2014-08-10 11:39:16 -06:00 |
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Gregory Nutt
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9a4e1f6fdd
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Move TC debug options to one file
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2014-08-10 11:38:44 -06:00 |
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Gregory Nutt
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33965a21e3
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Update comments
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2014-08-10 11:38:08 -06:00 |
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Gregory Nutt
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42b1bcdf33
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SAMA5: Fix bugs in timer/counter interrupts and one-shot timer
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2014-08-10 10:47:38 -06:00 |
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Gregory Nutt
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9cb0b680ac
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SAMA5 Timer/counter repair: Missing sem_post() caused a hang
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2014-08-09 18:34:52 -06:00 |
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Gregory Nutt
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c61ec08ee8
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SAMA5: Use the one-shot and free-running timers to implement tickless OS support for SAMA5
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2014-08-09 17:14:51 -06:00 |
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Gregory Nutt
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19ee65ac3e
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SAMA5 free-running timer: Add support for a free-running timer wrapper around the low-level timer/counter logic.
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2014-08-09 16:43:48 -06:00 |
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Gregory Nutt
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f9601b6801
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SAMA5 oneshot: Some clean-up and correction to the initial implementation
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2014-08-09 16:42:04 -06:00 |
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Gregory Nutt
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e4981b09d9
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SAMA5 timer/counter: Add support for a one-shot timer wrapper around the low-level timer/counter logic. This also involved several changes that rippled into the ADC driver (untested).
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2014-08-09 15:27:55 -06:00 |
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Gregory Nutt
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c7662e3f92
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SAMA5 T/C: Can now handle non-constant BOARD_MCK_FREQUENCY. Also now supports methods to attach user interrupt handlers
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2014-08-09 10:30:45 -06:00 |
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Gregory Nutt
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5d143578b0
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Fix errors in documentation and comments related to the Tickless OS. From Vijay Kumar
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2014-08-09 06:41:38 -06:00 |
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Gregory Nutt
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6455f60c60
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Remove os_internal.h it has been replace by several new header files under sched/. There have been some sneak inclusion paths via os_internal.h, so expect a few compilation errors for some architectures
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2014-08-08 18:39:28 -06:00 |
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Gregory Nutt
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4dc151097e
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Replace os_internal.h with sched/sched.h in files that actually reference something in sched.h
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2014-08-08 17:53:55 -06:00 |
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Gregory Nutt
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c98ece6bec
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Move task control files from sched/ to sched/task
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2014-08-08 16:44:08 -06:00 |
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Gregory Nutt
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1c99d53bb1
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Move clock functions from sched/ to sched/clock
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2014-08-08 14:43:02 -06:00 |
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Gregory Nutt
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192f82f380
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Move interrupt dispatch logic from sched/ to sched/irq
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2014-08-08 14:31:15 -06:00 |
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Gregory Nutt
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39183d37b8
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Change all time conversions. Yech. New timer units in microseconds breaks all existing logic that used milliseconds in the conversions. Something likely got broken doing this, probably because I confused a MSEC2TICK conversion with a TICK2MSEC conversion. Also, the tickless OS no appears fully functional and passes the OS test on the simulator with no errors
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2014-08-07 18:00:38 -06:00 |
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Gregory Nutt
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8b2a8fceba
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Change CONFIG_MSEC_PER_TICK to CONFIG_USEC_PER_TICK. This gives more options for system timers in general, but more importantly, let's us realize higher resolution for the case of CONFIG_SCHED_TICKLESS=y -- of course, at the risk of some new interger overvflow problems
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2014-08-07 13:42:47 -06:00 |
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Gregory Nutt
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f140e112e0
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Implements the tickless OS
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2014-08-07 11:39:16 -06:00 |
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Gregory Nutt
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c275ebef35
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Add support for a simulated interval timer support verification of the tickless OS.
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2014-08-06 18:29:29 -06:00 |
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Gregory Nutt
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595ec296fb
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Don't build in sched_processtimer.c if CONFIG_SCHED_TICKLESS is selected.
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2014-08-06 18:27:10 -06:00 |
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Gregory Nutt
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94afad9b70
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if CONFIG_SCHED_TICKLESS is defined, then the global variable g_system_timer does not exist
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2014-08-06 18:26:16 -06:00 |
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Gregory Nutt
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594083d870
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Rename up_timerinit() to up_timer_initailize(); Add prototypes for candidate interfaces for the tickless OS; Don't build existing timer initialization logic if CONFIG_SCHED_TICKLESS is defined.
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2014-08-06 16:26:01 -06:00 |
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Gregory Nutt
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d4a29fcf7e
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SAMA5D3 HSMCI: TX DMA is again disabled
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2014-08-05 07:07:39 -06:00 |
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Gregory Nutt
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553a16fac5
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SAMA5 PCK: Add Main clock as an option for the PCK clock source
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2014-08-03 10:17:50 -06:00 |
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Gregory Nutt
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1fc8f2b06d
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SAMA5 SSC: Verify that the requested bit width is supported. Correct some alignment tests that depend upon the data bit width.
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2014-08-02 14:26:49 -06:00 |
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Gregory Nutt
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715cf207ea
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SAMA5 WM8904: Fix errors in programmable clock output configuration
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2014-08-01 15:18:58 -06:00 |
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Gregory Nutt
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5e92347d60
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SAMA5 SSC: Start Delay is now configurable
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2014-08-01 14:10:37 -06:00 |
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Gregory Nutt
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d68a6059e0
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SAMA5 SSC: Frame Synch Delay is now configurable
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2014-08-01 12:25:31 -06:00 |
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Gregory Nutt
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c2c2921901
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SAMA5D SSC: Needs to account for data offset in audio buffer.
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2014-07-31 19:14:24 -06:00 |
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Gregory Nutt
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513329fd24
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SAMA5D3X-EK: Add support for the WM8904 audio CODEC
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2014-07-31 11:14:57 -06:00 |
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Gregory Nutt
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ffcc0b8da3
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SAMA5: Changes needed for a clean SAMA5D3 build after all of the recent SAMA5D4 changes.
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2014-07-31 11:09:56 -06:00 |
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Gregory Nutt
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c0c4cda763
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SAMA5 HSMCI: e-enable TX DMA and verify that DMA writes to the SD card are functional. They are so now TX DMA is re-enabled in the driver. This might affect the SAMA5D3 platforms where the TX DMA problem was found. The SAMA4D3 and 4 use the same HSMCI driver. Much has change since then and it is not surprising that DMA is now functional. However, the has not be re-verified on the SAMA5D3 which has a different DMA controller.
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2014-07-30 11:20:06 -06:00 |
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Gregory Nutt
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611ea42dbf
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SAMA5D HSMCI: Fix a problem on card insertion/removal callback handling. Interrupts were being disable so that the callbacks occurred with interrupts disabled. This resulted in loss of some interrupts and some not-so-good behaviors. The solution is to perform all callbacks on the work thread unconditionally (2014-7-29).
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2014-07-30 10:19:41 -06:00 |
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Gregory Nutt
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059812c872
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SAMA5D HSMCI: Add method to do RX transfer without DMA. The 8-byte SCR transfer was failing silently with the DMA transfer, leaving the SD card in single bit mode
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2014-07-29 21:13:28 -06:00 |
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Gregory Nutt
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8bbbc5b255
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Cosmetic changes to comments
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2014-07-29 07:17:01 -06:00 |
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Gregory Nutt
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e053158f95
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SAMA5D-EK: Correct system timer frequency. Input clock is MCK/2, not MCK
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2014-07-29 07:12:36 -06:00 |
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Gregory Nutt
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29ea8ab0e4
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Cosmetic changes to comments
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2014-07-29 07:11:16 -06:00 |
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Gregory Nutt
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42a975af74
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Fixes to last SAMA5 PMIC checkin
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2014-07-28 17:09:37 -06:00 |
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Gregory Nutt
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99927e918d
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LPC17xx: DC updates from Max. Also fixes some syntax errors that I introduced in the last commit.
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2014-07-28 07:23:49 -06:00 |
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Gregory Nutt
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dd4be66f1c
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ARM: Move L2 cache initialization to much later in the sequence
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2014-07-27 10:03:33 -06:00 |
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Gregory Nutt
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b57d2182ab
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ARMv7-A L2 Cache currently depends on EXPERIMENTAL because it does not yet work properly
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2014-07-26 18:48:54 -06:00 |
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Gregory Nutt
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6f5280d284
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ARMv7 L2 Cache: Minor bugfixes/improvements
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2014-07-26 18:48:26 -06:00 |
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Gregory Nutt
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ee59870325
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Enables cache early in boot-up sequence
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2014-07-26 18:48:00 -06:00 |
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Gregory Nutt
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4e146d2ec2
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Change naming from cp_XYZ_cache() to arch_XYP_cache() so that all cache operations will pick up L2 support if it is enabled
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2014-07-26 18:47:33 -06:00 |
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Gregory Nutt
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873788bf5a
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New cache.h file. Renames cp15_XYZ_cache() to arch_XYZ_cache() and addes L2 cache support if L2 cache is enabled
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2014-07-26 18:46:52 -06:00 |
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Gregory Nutt
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2eb526253b
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Rename ARMv7-A cache.h to cp15_cache.h. Things will be broken on this commit until I get the new cache.h in place.
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2014-07-26 16:54:19 -06:00 |
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Gregory Nutt
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6d9ca195ee
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arch/arm/src/armv7-a/arm_l2cc_pl310.c, l2cc.h, l2cc_pl310.h, Kconfig: Add initiali support for the ARM L2CC-PL310 L2 cache.
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2014-07-26 16:50:08 -06:00 |
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Gregory Nutt
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fcbf89c6f6
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ARMv7-A: L2CC PL310 address filtering is an optional feature
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2014-07-25 19:46:09 -06:00 |
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