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nuttx/arch/risc-v/include
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Henry Rovner 63375bf9cd BL808: Replace courier with M0 interrupt controller 
It turns out that the D0 core of the BL808 has an IRQ that represents all interrupt sources for the M0 core. This change uses this IRQ to access these sources, eliminating the need for IPC between M0 and D0.
2024-06-28 17:23:02 +08:00
..
bl602 arch: Remove the inclusion of arch/irq.h from chip/irq.h 2022-07-04 13:03:47 +03:00
bl808 BL808: Replace courier with M0 interrupt controller 2024-06-28 17:23:02 +08:00
c906 arch: Remove the inclusion of arch/irq.h from chip/irq.h 2022-07-04 13:03:47 +03:00
esp32c3 risc-v/espressif: Rename espressif/esp32c3 as esp32c3 2024-01-30 08:32:05 +01:00
esp32c3-legacy risc-v/esp32c3: Rename legacy approach esp32c3 as esp32c3-legacy 2024-01-30 08:32:05 +01:00
esp32c6 risc-v/espressif: Rename espressif/esp32c3 as esp32c3 2024-01-30 08:32:05 +01:00
esp32h2 risc-v/espressif: Rename espressif/esp32c3 as esp32c3 2024-01-30 08:32:05 +01:00
fe310 arch: Remove the inclusion of arch/irq.h from chip/irq.h 2022-07-04 13:03:47 +03:00
hpm6000 Add support for hpm6360evk 2024-02-18 09:17:56 -08:00
hpm6750 add hpmicro chip: hpm6750 2023-02-09 14:17:49 +08:00
jh7110 arch/risc-v: Add support for StarFive JH7110 SoC 2023-08-03 22:55:55 -07:00
k210 arch: Remove the inclusion of arch/irq.h from chip/irq.h 2022-07-04 13:03:47 +03:00
k230 risc-v/k230: add IPI support to speed up RPTUN/RPMSG 2024-02-21 04:37:03 -08:00
litex risc-v/litex: fix typo in litex/irq.h 2024-01-06 04:15:52 -08:00
mpfs risc-v/mpfs: add athena irq defines 2023-02-15 00:21:03 +08:00
qemu-rv arch: Remove the inclusion of arch/irq.h from chip/irq.h 2022-07-04 13:03:47 +03:00
rv32m1 arch: Remove the inclusion of arch/irq.h from chip/irq.h 2022-07-04 13:03:47 +03:00
sg2000 arch/risc-v: Add support for SOPHGO SG2000 SoC (T-Head C906) 2024-06-17 09:41:29 +08:00
thead arch/riscv: add T-HEAD CSR mapping 2024-04-11 22:20:39 +08:00
.gitignore
arch.h risc-v/arch.h: revising comments 2024-03-25 20:39:24 +08:00
barriers.h riscv/barrier: Define more granular memory barriers 2023-06-14 16:14:57 -03:00
csr.h riscv: Add indirect CSRs for CLIC 2024-06-21 03:02:59 +08:00
elf.h arch/risc-v/include/elf.f: Support coredump for rv32 and rv64 targets. 2024-06-18 10:41:56 +08:00
inttypes.h arch/risc-v: move PRIxREG to inttypes.h 2024-06-22 22:00:06 +08:00
irq.h riscv: Improve exception and irq mapping 2024-06-26 09:07:52 +08:00
limits.h arch/risc-v: initial qemu-rv64ilp32 support 2024-06-14 19:50:00 +08:00
mode.h arch/risc-v: add risc-v SSTC extension support 2024-04-27 22:09:22 -03:00
setjmp.h arch/risc-v: Save/Load float register in setjmp 2022-03-09 10:15:54 +02:00
spinlock.h arch/risc-v: Replace __LP64__ with CONFIG_ARCH_RV64 2022-01-04 23:22:43 +08:00
stdarg.h arch: risc-V: Author Gregory Nutt: update licenses to Apache 2021-03-31 08:48:51 -07:00
syscall.h riscv/syscall: Optimize user service call performance 2024-06-01 10:40:53 -03:00
types.h arch/risc-v: Improve the SBI function handle 2024-06-19 20:55:10 +08:00