Tiago Medicci Serrano 57b8fc9954 esp32/irq: Allow IRAM ISRs to run during SPI flash operation ... This commit provides an interface to register ISRs that run from IRAM and keeps track of the non-IRAM interrupts. It enables, for instance, to avoid disabling all the interrupts during a SPI flash operation: IRAM-enabled ISRs are, then, able to run during these operations. It also makes the code look more similar to the ESP32-S3 SPI flash implementation by creating a common `esp32_spiflash_init` that is responsible to create the SPI flash operation tasks. The function intended to initialize the SPI flash partions was, then, renamed to `board_spiflash_init`.		2023-11-10 09:11:35 +08:00
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esp32	esp32/irq: Allow IRAM ISRs to run during SPI flash operation	2023-11-10 09:11:35 +08:00
esp32s2	xtensa/esp32s2: Add support to TWAI/CANBus controller	2023-09-28 09:35:08 +08:00
esp32s3	xtensa/esp32s3: Disable psram as task stack	2023-11-08 16:25:57 -03:00
lx6
lx7
xtensa	Indent the define statement by two spaces	2023-05-21 09:52:08 -03:00
.gitignore
arch.h	xtensa/esp32s3: Disable psram as task stack	2023-11-08 16:25:57 -03:00
elf.h
inttypes.h
irq.h
limits.h
loadstore.h
setjmp.h
simcall.h
spinlock.h
stdarg.h
syscall.h
types.h