hujun5 8275a846b1 arch: move sigdeliver to common code ... Signed-off-by: hujun5 <hujun5@xiaomi.com>		2024-10-11 01:30:51 +08:00
..
esp32	esp32/irq: Allow IRAM ISRs to run during SPI flash operation	2023-11-10 09:11:35 +08:00
esp32s2	xtensa/esp32s2: add WiFi support on ESP32S2	2024-09-06 09:46:59 +08:00
esp32s3	esp32s3: add simple boot support	2024-04-17 19:43:05 +08:00
lx6	arch: xtensa: Author Gregory Nutt: update licenses to Apache	2021-04-02 03:14:31 -05:00
lx7	xtensa: Add initial support for ESP32-S3	2022-01-27 13:46:50 -03:00
xtensa	Indent the define statement by two spaces	2023-05-21 09:52:08 -03:00
.gitignore
arch.h	xtensa/esp32s3: Disable psram as task stack	2023-11-08 16:25:57 -03:00
elf.h
inttypes.h	arch: Omni Hoverboards: update licenses to Apache	2021-09-28 04:37:38 -07:00
irq.h	arch: move sigdeliver to common code	2024-10-11 01:30:51 +08:00
limits.h	arch: Define WCHAR_[MIN|MAX] in arch/include/limits.h	2022-06-03 22:25:49 +03:00
loadstore.h
setjmp.h	xtensa: add setjmp.h include file	2021-11-17 02:23:45 -06:00
simcall.h
spinlock.h	arch: inline up_testset in arm arm64 riscv xtensa	2024-08-21 01:45:10 +08:00
stdarg.h	arch:xtensa: add arch stdarg.h include file for xtensa	2021-08-09 17:58:25 -03:00
syscall.h	xtensa: Add missing input operand on sys_call6 inline ASM	2022-05-18 15:46:57 +02:00
types.h	types.h: fix windows build error	2024-08-14 22:36:57 +08:00