Gustavo Henrique Nihei a6fea1c3a5 risc-v/esp32c3: Enable Timer Groups clocks on timer initialization ... Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>		2022-02-25 22:49:22 +08:00
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bl602	Replece clock_gettime(CLOCK_REALTIME) with clock_systime_timespec if suitable	2022-02-24 01:06:36 +08:00
c906	risc-v: Rename up_fault to riscv_fault	2022-02-18 13:25:01 +08:00
common	arch/risc-v: Update outdated comments	2022-02-25 20:36:16 +08:00
esp32c3	risc-v/esp32c3: Enable Timer Groups clocks on timer initialization	2022-02-25 22:49:22 +08:00
fe310	risc-v: Use _ebss instead of _default_stack_limit as idle stack base	2022-02-13 14:37:57 +08:00
k210	risc-v: Rename up_fault to riscv_fault	2022-02-18 13:25:01 +08:00
litex	arch: Add xxx_tcbinfo.c to SoC level Make.defs	2022-02-12 21:07:35 +09:00
mpfs	Remove the double blank line from source files	2022-02-20 20:10:14 +01:00
opensbi	arch/risc-v/src: Cleanups for opensbi	2022-01-25 00:10:46 +08:00
qemu-rv	risc-v/qemu-rv: Supports SMP up to 8 cores	2022-02-18 13:25:01 +08:00
rv32m1	arch: Add xxx_tcbinfo.c to SoC level Make.defs	2022-02-12 21:07:35 +09:00
.gitignore	build: Remve the unnecessary .gitignore	2020-05-23 18:00:40 +01:00
Makefile	arch/risc-v: Update outdated comments	2022-02-25 20:36:16 +08:00