nuttx/arch/risc-v/include
Yanfeng Liu 3fb56c9218 arch/risc-v: move PRIxREG to inttypes.h
This moves PRIxREG to inttypes.h to make it available for both kernel
and user spaces.

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
2024-06-22 22:00:06 +08:00
..
bl602
bl808
c906
esp32c3
esp32c3-legacy
esp32c6
esp32h2
fe310
hpm6000
hpm6750
jh7110
k210
k230
litex
mpfs
qemu-rv
rv32m1
sg2000 arch/risc-v: Add support for SOPHGO SG2000 SoC (T-Head C906) 2024-06-17 09:41:29 +08:00
thead
.gitignore
arch.h
barriers.h
csr.h riscv: Add indirect CSRs for CLIC 2024-06-21 03:02:59 +08:00
elf.h arch/risc-v/include/elf.f: Support coredump for rv32 and rv64 targets. 2024-06-18 10:41:56 +08:00
inttypes.h arch/risc-v: move PRIxREG to inttypes.h 2024-06-22 22:00:06 +08:00
irq.h arch/risc-v: initial qemu-rv64ilp32 support 2024-06-14 19:50:00 +08:00
limits.h arch/risc-v: initial qemu-rv64ilp32 support 2024-06-14 19:50:00 +08:00
mode.h
setjmp.h
spinlock.h
stdarg.h
syscall.h riscv/syscall: Optimize user service call performance 2024-06-01 10:40:53 -03:00
types.h arch/risc-v: Improve the SBI function handle 2024-06-19 20:55:10 +08:00