Gregory Nutt 12148f0e33 Merged in paulpatience/nuttx/stm32 (pull request #180) ... STM32: Forgot to update chip.h for STM32F303x[BC]'s 4 ADCs		2016-12-24 20:20:39 -06:00
..
a1x
arm	Fix a few compile related issues from the last commit	2016-11-26 12:23:09 -06:00
armv6-m	i.MX6 SMP: Inter-CPU data no saved in a non-cacheable region.	2016-11-26 12:04:02 -06:00
armv7-a	i.MX6: Remove non-cached, inter-cpu memory region. Not a useful concept.	2016-12-13 16:59:50 -06:00
armv7-m	i.MX6 SMP: Inter-CPU data no saved in a non-cacheable region.	2016-11-26 12:04:02 -06:00
armv7-r	i.MX6 SMP: Inter-CPU data no saved in a non-cacheable region.	2016-11-26 12:04:02 -06:00
c5471
dm320
efm32
imx1
imx6
kinetis
kl
lpc11xx
lpc17xx
lpc31xx
lpc43xx
lpc214x
lpc2378
moxart
nuc1xx
sam34
sama5
samdl
samv7
stm32	STM32: Forgot to update chip.h for STM32F303x[BC]'s 4 ADCs	2016-12-08 16:31:39 -05:00
stm32f7
stm32l4	STM32L4: Correct USART1/2 definitions. Use default mbed UART4 settings	2016-12-01 09:00:59 -06:00
str71x
tiva
tms570
.gitignore
arch.h
elf.h
inttypes.h
irq.h
limits.h
serial.h
spinlock.h	i.MX6 SMP: Inter-CPU data no saved in a non-cacheable region.	2016-11-26 12:04:02 -06:00
stdarg.h
syscall.h
tls.h
types.h
watchdog.h