Alan Carvalho de Assis e950e53df2 esp32c3: Always reserve CPU INT 0 and fix cpu init order ... Co-author: Tiago Medicci <tiago.medicci@espressif.com> Co-author: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>		2023-02-03 12:24:11 +08:00
..
bl602	arch: Remove the inclusion of arch/irq.h from chip/irq.h	2022-07-04 13:03:47 +03:00
c906	arch: Remove the inclusion of arch/irq.h from chip/irq.h	2022-07-04 13:03:47 +03:00
esp32c3	esp32c3: Always reserve CPU INT 0 and fix cpu init order	2023-02-03 12:24:11 +08:00
fe310	arch: Remove the inclusion of arch/irq.h from chip/irq.h	2022-07-04 13:03:47 +03:00
k210	arch: Remove the inclusion of arch/irq.h from chip/irq.h	2022-07-04 13:03:47 +03:00
litex	litex: Add GPIO driver.	2023-02-01 11:02:03 +08:00
mpfs	Remove executable permission from source and build files.	2022-08-04 12:48:18 -03:00
qemu-rv	arch: Remove the inclusion of arch/irq.h from chip/irq.h	2022-07-04 13:03:47 +03:00
rv32m1	arch: Remove the inclusion of arch/irq.h from chip/irq.h	2022-07-04 13:03:47 +03:00
.gitignore
arch.h	arch/addrenv: Change group_addrenv_t to arch_addrenv_t	2023-01-27 23:17:01 +08:00
barriers.h
csr.h
elf.h
inttypes.h
irq.h	arch/risc-v: Move __XSTR, FLOAD/FSTORE and REGLOAD/REGSTORE to the right place	2022-07-04 13:25:56 +03:00
limits.h
mode.h	riscv: Dump trap val in exception handler	2022-08-30 14:55:33 +08:00
setjmp.h
spinlock.h
stdarg.h
syscall.h	arch/risc-v: Move __XSTR, FLOAD/FSTORE and REGLOAD/REGSTORE to the right place	2022-07-04 13:25:56 +03:00
types.h