David S. Alessio 7f2c4c4274 XMC4xxx: Add FPU support

2017-03-22 12:04:32 -06:00

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a1x

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arm

Fix a few compile related issues from the last commit

2016-11-26 12:23:09 -06:00

armv6-m

i.MX6 SMP: Inter-CPU data no saved in a non-cacheable region.

2016-11-26 12:04:02 -06:00

armv7-a

i.MX6: Remove non-cached, inter-cpu memory region. Not a useful concept.

2016-12-13 16:59:50 -06:00

armv7-m

i.MX6 SMP: Inter-CPU data no saved in a non-cacheable region.

2016-11-26 12:04:02 -06:00

armv7-r

i.MX6 SMP: Inter-CPU data no saved in a non-cacheable region.

2016-11-26 12:04:02 -06:00

c5471

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dm320

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efm32

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imx1

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imx6

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kinetis

Kinetis:Add LPUART to K66 chip

2017-02-25 07:02:56 -10:00

kl

Kinetis, not Kinetics.

2017-02-07 08:20:52 -06:00

lpc11xx

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lpc17xx

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lpc31xx

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lpc43xx

add LPC4337FET256

2017-03-09 10:30:28 +01:00

lpc214x

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lpc2378

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moxart

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nuc1xx

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sam34

SAM3/4: Add support for ATSAM4S4C.

2017-01-18 11:56:51 -08:00

sama5

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samdl

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samv7

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stm32

Fixes for coding standard: '*' needs to 'snuggle' with following variable name

2017-02-28 18:37:44 -06:00

stm32f7

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stm32l4

STM32L4: Correct USART1/2 definitions. Use default mbed UART4 settings

2016-12-01 09:00:59 -06:00

str71x

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tiva

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tms570

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xmc4

XMC4xxx: Add FPU support

2017-03-22 12:04:32 -06:00

.gitignore

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arch.h

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elf.h

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inttypes.h

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irq.h

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limits.h

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serial.h

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spinlock.h

i.MX6 SMP: Inter-CPU data no saved in a non-cacheable region.

2016-11-26 12:04:02 -06:00

stdarg.h

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syscall.h

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tls.h

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types.h

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watchdog.h

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