2018-10-28 17:39:56 +01:00
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/****************************************************************************
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2019-08-19 17:16:08 +02:00
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* boards/arm/stm32/nucleo-f303ze/include/board.h
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2018-10-28 17:39:56 +01:00
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*
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2020-10-10 16:36:00 +02:00
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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2018-10-28 17:39:56 +01:00
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*
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2020-10-10 16:36:00 +02:00
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* http://www.apache.org/licenses/LICENSE-2.0
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2018-10-28 17:39:56 +01:00
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*
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2020-10-10 16:36:00 +02:00
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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2018-10-28 17:39:56 +01:00
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*
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****************************************************************************/
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2019-08-19 17:16:08 +02:00
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#ifndef __BOARDS_ARM_STM32_NUCLEOF303ZE_INCLUDE_BOARD_H
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#define __BOARDS_ARM_STM32_NUCLEOF303ZE_INCLUDE_BOARD_H
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2018-10-28 17:39:56 +01:00
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#ifndef __ASSEMBLY__
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# include <stdint.h>
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# include <stdbool.h>
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#endif
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#ifdef __KERNEL__
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# include "stm32.h"
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#endif
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Clocking *****************************************************************/
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/* HSI - Internal 8 MHz RC Oscillator
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* LSI - 32 KHz RC
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2018-12-19 19:36:35 +01:00
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* HSE - 8 MHz from MCO output of ST-LINK
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* LSE - 32.768 kHz
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*/
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#define STM32_BOARD_XTAL 8000000ul /* X1 on board */
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2018-12-19 19:36:35 +01:00
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#define STM32_HSEBYP_ENABLE
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#define STM32_HSI_FREQUENCY 8000000ul
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#define STM32_LSI_FREQUENCY 40000 /* Between 30kHz and 60kHz */
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#define STM32_HSE_FREQUENCY STM32_BOARD_XTAL
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#define STM32_LSE_FREQUENCY 32768 /* X2 on board */
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2020-10-10 17:00:18 +02:00
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/* PLL source is HSE/1, PLL multipler is 9:
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* PLL frequency is 8MHz (XTAL) x 9 = 72MHz
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*/
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2018-10-28 17:39:56 +01:00
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#define STM32_CFGR_PLLSRC RCC_CFGR_PLLSRC
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#define STM32_CFGR_PLLXTPRE 0
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#define STM32_CFGR_PLLMUL RCC_CFGR_PLLMUL_CLKx9
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#define STM32_PLL_FREQUENCY (9*STM32_BOARD_XTAL)
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/* Use the PLL and set the SYSCLK source to be the PLL */
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#define STM32_SYSCLK_SW RCC_CFGR_SW_PLL
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#define STM32_SYSCLK_SWS RCC_CFGR_SWS_PLL
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#define STM32_SYSCLK_FREQUENCY STM32_PLL_FREQUENCY
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/* AHB clock (HCLK) is SYSCLK (72MHz) */
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#define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK
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#define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY
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#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */
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/* APB2 clock (PCLK2) is HCLK (72MHz) */
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#define STM32_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLK
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#define STM32_PCLK2_FREQUENCY STM32_HCLK_FREQUENCY
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#define STM32_APB2_CLKIN (STM32_PCLK2_FREQUENCY) /* Timers 1 and 8, 15-17 */
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/* APB2 timers 1 and 8, 15-17 will receive PCLK2. */
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/* Timers driven from APB2 will be PCLK2 */
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#define STM32_APB2_TIM1_CLKIN (STM32_PCLK2_FREQUENCY)
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#define STM32_APB2_TIM8_CLKIN (STM32_PCLK2_FREQUENCY)
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#define STM32_APB1_TIM15_CLKIN (STM32_PCLK2_FREQUENCY)
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#define STM32_APB1_TIM16_CLKIN (STM32_PCLK2_FREQUENCY)
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#define STM32_APB1_TIM17_CLKIN (STM32_PCLK2_FREQUENCY)
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/* APB1 clock (PCLK1) is HCLK/2 (36MHz) */
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#define STM32_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLKd2
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#define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY/2)
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/* APB1 timers 2-7 will be twice PCLK1 */
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#define STM32_APB1_TIM2_CLKIN (2*STM32_PCLK1_FREQUENCY)
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#define STM32_APB1_TIM3_CLKIN (2*STM32_PCLK1_FREQUENCY)
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#define STM32_APB1_TIM4_CLKIN (2*STM32_PCLK1_FREQUENCY)
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#define STM32_APB1_TIM6_CLKIN (2*STM32_PCLK1_FREQUENCY)
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#define STM32_APB1_TIM7_CLKIN (2*STM32_PCLK1_FREQUENCY)
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/* USB divider -- Divide PLL clock by 1.5 */
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#define STM32_CFGR_USBPRE 0
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/* Timer Frequencies, if APBx is set to 1, frequency is same to APBx
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* otherwise frequency is 2xAPBx.
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* Note: TIM1,8 are on APB2, others on APB1
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*/
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#define BOARD_TIM1_FREQUENCY STM32_HCLK_FREQUENCY
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#define BOARD_TIM2_FREQUENCY (STM32_HCLK_FREQUENCY / 2)
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#define BOARD_TIM3_FREQUENCY (STM32_HCLK_FREQUENCY / 2)
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#define BOARD_TIM4_FREQUENCY (STM32_HCLK_FREQUENCY / 2)
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#define BOARD_TIM5_FREQUENCY (STM32_HCLK_FREQUENCY / 2)
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#define BOARD_TIM6_FREQUENCY (STM32_HCLK_FREQUENCY / 2)
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#define BOARD_TIM7_FREQUENCY (STM32_HCLK_FREQUENCY / 2)
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#define BOARD_TIM8_FREQUENCY STM32_HCLK_FREQUENCY
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/* LED definitions **********************************************************/
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/* The Nucleo-144 board has numerous LEDs but only three, LD1 a Green LED,
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* LD2 a Blue LED and LD3 a Red LED, that can be controlled by software.
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* The following definitions assume the default Solder Bridges are installed.
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2018-10-28 17:39:56 +01:00
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*
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* If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs
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* in any way.
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2018-10-28 17:39:56 +01:00
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* The following definitions are used to access individual LEDs.
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*/
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/* LED index values for use with board_userled() */
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#define BOARD_LED1 0
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#define BOARD_LED2 1
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#define BOARD_LED3 2
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#define BOARD_NLEDS 3
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#define BOARD_LED_GREEN BOARD_LED1
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#define BOARD_LED_BLUE BOARD_LED2
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#define BOARD_LED_RED BOARD_LED3
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/* LED bits for use with board_userled_all() */
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#define BOARD_LED1_BIT (1 << BOARD_LED1)
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#define BOARD_LED2_BIT (1 << BOARD_LED2)
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#define BOARD_LED3_BIT (1 << BOARD_LED3)
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/* If CONFIG_ARCH_LEDS is defined, the usage by the board port is defined in
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* include/board.h and src/stm32_leds.c. The LEDs are used to encode
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* OS-related events as follows:
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2018-10-28 17:39:56 +01:00
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*
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*
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* SYMBOL Meaning LED state
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* Red Green Blue
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* ---------------------- -------------------------- ------ ------ ----
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*/
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#define LED_STARTED 0 /* NuttX has been started OFF OFF OFF */
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#define LED_HEAPALLOCATE 1 /* Heap has been allocated OFF OFF ON */
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#define LED_IRQSENABLED 2 /* Interrupts enabled OFF ON OFF */
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#define LED_STACKCREATED 3 /* Idle stack created OFF ON ON */
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#define LED_INIRQ 4 /* In an interrupt N/C N/C GLOW */
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#define LED_SIGNAL 5 /* In a signal handler N/C GLOW N/C */
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#define LED_ASSERTION 6 /* An assertion failed GLOW N/C GLOW */
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#define LED_PANIC 7 /* The system has crashed Blink OFF N/C */
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#define LED_IDLE 8 /* MCU is is sleep mode ON OFF OFF */
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/* Button definitions *******************************************************/
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/* The NUCLEO board supports one button: Pushbutton B1, labeled "User", is
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* connected to GPIO PC13. A high value will be sensed when the button is
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* depressed.
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*/
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#define BUTTON_USER 0
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#define NUM_BUTTONS 1
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#define BUTTON_USER_BIT (1 << BUTTON_USER)
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/* Alternate function pin selections ****************************************/
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/* USART3 (Nucleo Virtual Console) */
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#define GPIO_USART3_RX GPIO_USART3_RX_3 /* PD9 */
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#define GPIO_USART3_TX GPIO_USART3_TX_3 /* PD8 */
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2019-05-15 10:20:28 +02:00
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/* I2C1 Use Nucleo I2C1 pins */
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#define GPIO_I2C1_SCL GPIO_I2C1_SCL_3 /* PB8 - D15 */
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#define GPIO_I2C1_SDA GPIO_I2C1_SDA_3 /* PB9 - D14 */
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/* I2C2 Use Nucleo I2C2 pins */
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#define GPIO_I2C2_SCL GPIO_I2C2_SCL_2 /* PF1 - D69 */
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#define GPIO_I2C2_SDA GPIO_I2C2_SDA_2 /* PF0 - D68 */
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#define GPIO_I2C2_SMBA GPIO_I2C2_SMBA_2 /* PF2 - D70 */
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2018-11-12 16:45:55 +01:00
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/* DMA **********************************************************************/
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#define ADC1_DMA_CHAN DMACHAN_ADC1
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#define ADC3_DMA_CHAN DMACHAN_ADC3
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2019-08-19 17:16:08 +02:00
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#endif /* __BOARDS_ARM_STM32_NUCLEO_F303ZE_INCLUDE_BOARD_H */
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