2015-10-03 01:42:29 +02:00
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/****************************************************************************
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2013-06-02 21:57:22 +02:00
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* arch/arm/src/sam34/sam_lowputc.c
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2010-01-17 18:55:13 +01:00
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*
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2021-03-24 09:34:53 +01:00
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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2010-01-17 18:55:13 +01:00
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*
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2021-03-24 09:34:53 +01:00
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* http://www.apache.org/licenses/LICENSE-2.0
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2010-01-17 18:55:13 +01:00
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*
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2021-03-24 09:34:53 +01:00
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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2010-01-17 18:55:13 +01:00
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*
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2015-10-03 01:42:29 +02:00
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****************************************************************************/
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2010-01-17 18:55:13 +01:00
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2015-10-03 01:42:29 +02:00
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/****************************************************************************
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2010-01-17 18:55:13 +01:00
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* Included Files
|
2015-10-03 01:42:29 +02:00
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****************************************************************************/
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2010-01-17 18:55:13 +01:00
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#include <nuttx/config.h>
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#include <stdint.h>
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2016-02-14 02:11:09 +01:00
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#include <nuttx/irq.h>
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2010-01-17 18:55:13 +01:00
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2020-05-01 03:20:29 +02:00
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#include "arm_internal.h"
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|
|
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#include "arm_arch.h"
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2010-01-17 18:55:13 +01:00
|
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|
|
2013-06-02 21:04:40 +02:00
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#include "sam_gpio.h"
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2013-06-13 01:32:00 +02:00
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#include "sam_periphclks.h"
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2013-06-02 21:04:40 +02:00
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#include "sam_lowputc.h"
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2013-06-08 19:39:06 +02:00
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2013-06-27 19:06:13 +02:00
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#if defined(CONFIG_ARCH_CHIP_SAM3U) || defined(CONFIG_ARCH_CHIP_SAM3X) || \
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2014-06-25 16:25:52 +02:00
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defined(CONFIG_ARCH_CHIP_SAM3A) || defined(CONFIG_ARCH_CHIP_SAM4CM) || \
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|
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defined(CONFIG_ARCH_CHIP_SAM4S) || defined(CONFIG_ARCH_CHIP_SAM4E)
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2019-05-25 15:37:39 +02:00
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# include "hardware/sam_uart.h"
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2013-06-08 19:39:06 +02:00
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#elif defined(CONFIG_ARCH_CHIP_SAM4L)
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2019-05-25 15:37:39 +02:00
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# include "hardware/sam4l_usart.h"
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2013-06-08 19:39:06 +02:00
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#else
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# error Unknown UART
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#endif
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2015-07-11 02:41:26 +02:00
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/* The board.h file may redefine pin configurations defined in sam_pinmap.h */
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2019-05-25 15:37:39 +02:00
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#include "hardware/sam_pinmap.h"
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2015-07-11 02:41:26 +02:00
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#include <arch/board/board.h>
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2010-01-17 18:55:13 +01:00
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2015-10-03 01:42:29 +02:00
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/****************************************************************************
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2015-04-08 16:04:12 +02:00
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* Pre-processor Definitions
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2015-10-03 01:42:29 +02:00
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****************************************************************************/
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2010-01-17 18:55:13 +01:00
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2021-03-24 09:35:15 +01:00
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/* Configuration ************************************************************/
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2010-01-17 18:55:13 +01:00
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2010-01-21 03:35:34 +01:00
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/* If the USART is not being used as a UART, then it really isn't enabled
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* for our purposes.
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*/
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2016-05-25 19:21:48 +02:00
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#ifndef CONFIG_USART0_SERIALDRIVER
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2013-06-02 18:33:57 +02:00
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# undef CONFIG_SAM34_USART0
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2010-01-17 18:55:13 +01:00
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#endif
|
2016-05-25 19:21:48 +02:00
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#ifndef CONFIG_USART1_SERIALDRIVER
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2013-06-02 18:33:57 +02:00
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# undef CONFIG_SAM34_USART1
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2010-01-17 18:55:13 +01:00
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#endif
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2016-05-25 19:21:48 +02:00
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#ifndef CONFIG_USART2_SERIALDRIVER
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2013-06-02 18:33:57 +02:00
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# undef CONFIG_SAM34_USART2
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2010-01-17 18:55:13 +01:00
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#endif
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2016-05-25 19:21:48 +02:00
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#ifndef CONFIG_USART3_SERIALDRIVER
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2013-06-02 18:33:57 +02:00
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# undef CONFIG_SAM34_USART3
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2010-01-17 18:55:13 +01:00
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#endif
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2013-06-11 22:32:07 +02:00
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/* Is there a serial console? It could be on UART0-1 or USART0-3 */
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2010-01-17 18:55:13 +01:00
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2013-06-11 00:18:47 +02:00
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#if defined(CONFIG_UART0_SERIAL_CONSOLE) && defined(CONFIG_SAM34_UART0)
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2013-06-11 22:32:07 +02:00
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# undef CONFIG_UART1_SERIAL_CONSOLE
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# undef CONFIG_USART0_SERIAL_CONSOLE
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# undef CONFIG_USART1_SERIAL_CONSOLE
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# undef CONFIG_USART2_SERIAL_CONSOLE
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# undef CONFIG_USART3_SERIAL_CONSOLE
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# define HAVE_CONSOLE 1
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#elif defined(CONFIG_UART1_SERIAL_CONSOLE) && defined(CONFIG_SAM34_UART1)
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# undef CONFIG_UART0_SERIAL_CONSOLE
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2010-01-17 18:55:13 +01:00
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# undef CONFIG_USART0_SERIAL_CONSOLE
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# undef CONFIG_USART1_SERIAL_CONSOLE
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# undef CONFIG_USART2_SERIAL_CONSOLE
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# undef CONFIG_USART3_SERIAL_CONSOLE
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# define HAVE_CONSOLE 1
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2013-06-02 18:33:57 +02:00
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#elif defined(CONFIG_USART0_SERIAL_CONSOLE) && defined(CONFIG_SAM34_USART0)
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2013-06-11 22:32:07 +02:00
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# undef CONFIG_UART0_SERIAL_CONSOLE
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# undef CONFIG_UART1_SERIAL_CONSOLE
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2010-01-17 18:55:13 +01:00
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# undef CONFIG_USART1_SERIAL_CONSOLE
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# undef CONFIG_USART2_SERIAL_CONSOLE
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# undef CONFIG_USART3_SERIAL_CONSOLE
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# define HAVE_CONSOLE 1
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2013-06-02 18:33:57 +02:00
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#elif defined(CONFIG_USART1_SERIAL_CONSOLE) && defined(CONFIG_SAM34_USART1)
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2013-06-11 22:32:07 +02:00
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# undef CONFIG_UART0_SERIAL_CONSOLE
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# undef CONFIG_UART1_SERIAL_CONSOLE
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2010-01-17 18:55:13 +01:00
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# undef CONFIG_USART0_SERIAL_CONSOLE
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# undef CONFIG_USART2_SERIAL_CONSOLE
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# undef CONFIG_USART3_SERIAL_CONSOLE
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# define HAVE_CONSOLE 1
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2013-06-02 18:33:57 +02:00
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#elif defined(CONFIG_USART2_SERIAL_CONSOLE) && defined(CONFIG_SAM34_USART2)
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2013-06-11 22:32:07 +02:00
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# undef CONFIG_UART0_SERIAL_CONSOLE
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# undef CONFIG_UART1_SERIAL_CONSOLE
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2010-01-17 18:55:13 +01:00
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# undef CONFIG_USART0_SERIAL_CONSOLE
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# undef CONFIG_USART1_SERIAL_CONSOLE
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# undef CONFIG_USART3_SERIAL_CONSOLE
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# define HAVE_CONSOLE 1
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2013-06-02 18:33:57 +02:00
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#elif defined(CONFIG_USART3_SERIAL_CONSOLE) && defined(CONFIG_SAM34_USART3)
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2013-06-11 22:32:07 +02:00
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# undef CONFIG_UART0_SERIAL_CONSOLE
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# undef CONFIG_UART1_SERIAL_CONSOLE
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2010-01-17 18:55:13 +01:00
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# undef CONFIG_USART0_SERIAL_CONSOLE
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# undef CONFIG_USART1_SERIAL_CONSOLE
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# undef CONFIG_USART2_SERIAL_CONSOLE
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# define HAVE_CONSOLE 1
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#else
|
2014-03-22 17:18:06 +01:00
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# if !defined(CONFIG_NO_SERIAL_CONSOLE)
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# warning "No valid CONFIG_USARTn_SERIAL_CONSOLE Setting"
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# endif
|
2013-06-11 22:32:07 +02:00
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# undef CONFIG_UART0_SERIAL_CONSOLE
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# undef CONFIG_UART1_SERIAL_CONSOLE
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2010-01-17 18:55:13 +01:00
|
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# undef CONFIG_USART0_SERIAL_CONSOLE
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# undef CONFIG_USART1_SERIAL_CONSOLE
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# undef CONFIG_USART2_SERIAL_CONSOLE
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# undef CONFIG_USART3_SERIAL_CONSOLE
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# undef HAVE_CONSOLE
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#endif
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|
2014-03-22 17:18:06 +01:00
|
|
|
#if defined(HAVE_CONSOLE)
|
2013-06-08 21:50:42 +02:00
|
|
|
|
2014-03-22 17:18:06 +01:00
|
|
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/* Select MCU-specific settings
|
|
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|
*
|
2021-03-24 09:35:15 +01:00
|
|
|
* For the SAM3U, SAM3A, SAM3X, SAM4E and SAM4S the USARTs are driven by
|
|
|
|
* the main clock. (This could also be the MCK/8 or an external clock
|
|
|
|
* but those options have not yet been necessary).
|
2014-03-22 17:18:06 +01:00
|
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|
* For the SAM4L, the USARTs are driven by CLK_USART (undivided) which is
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* selected by the PBADIVMASK register.
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*/
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|
# if defined(CONFIG_ARCH_CHIP_SAM3U) || defined(CONFIG_ARCH_CHIP_SAM3X) || \
|
2014-06-25 16:25:52 +02:00
|
|
|
defined(CONFIG_ARCH_CHIP_SAM3A) || defined(CONFIG_ARCH_CHIP_SAM4CM) || \
|
|
|
|
defined(CONFIG_ARCH_CHIP_SAM4S) || defined(CONFIG_ARCH_CHIP_SAM4E)
|
2014-03-22 17:18:06 +01:00
|
|
|
# define SAM_MR_USCLKS UART_MR_USCLKS_MCK /* Source = Main clock */
|
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|
|
# define SAM_USART_CLOCK BOARD_MCK_FREQUENCY /* Frequency of the main clock */
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|
|
|
# elif defined(CONFIG_ARCH_CHIP_SAM4L)
|
|
|
|
# define SAM_MR_USCLKS UART_MR_USCLKS_USART /* Source = USART_CLK (undefined) */
|
|
|
|
# define SAM_USART_CLOCK BOARD_PBA_FREQUENCY /* PBA frequency is undivided */
|
|
|
|
# else
|
|
|
|
# error Unrecognized SAM architecture
|
|
|
|
# endif
|
2013-06-08 21:50:42 +02:00
|
|
|
|
2010-01-17 18:55:13 +01:00
|
|
|
/* Select USART parameters for the selected console */
|
|
|
|
|
2014-03-22 17:18:06 +01:00
|
|
|
# if defined(CONFIG_UART0_SERIAL_CONSOLE)
|
|
|
|
# define SAM_CONSOLE_BASE SAM_UART0_BASE
|
|
|
|
# define SAM_CONSOLE_BAUD CONFIG_UART0_BAUD
|
|
|
|
# define SAM_CONSOLE_BITS CONFIG_UART0_BITS
|
|
|
|
# define SAM_CONSOLE_PARITY CONFIG_UART0_PARITY
|
|
|
|
# define SAM_CONSOLE_2STOP CONFIG_UART0_2STOP
|
|
|
|
# elif defined(CONFIG_UART1_SERIAL_CONSOLE)
|
|
|
|
# define SAM_CONSOLE_BASE SAM_UART1_BASE
|
|
|
|
# define SAM_CONSOLE_BAUD CONFIG_UART1_BAUD
|
|
|
|
# define SAM_CONSOLE_BITS CONFIG_UART1_BITS
|
|
|
|
# define SAM_CONSOLE_PARITY CONFIG_UART1_PARITY
|
|
|
|
# define SAM_CONSOLE_2STOP CONFIG_UART1_2STOP
|
|
|
|
# elif defined(CONFIG_USART0_SERIAL_CONSOLE)
|
|
|
|
# define SAM_CONSOLE_BASE SAM_USART0_BASE
|
|
|
|
# define SAM_CONSOLE_BAUD CONFIG_USART0_BAUD
|
|
|
|
# define SAM_CONSOLE_BITS CONFIG_USART0_BITS
|
|
|
|
# define SAM_CONSOLE_PARITY CONFIG_USART0_PARITY
|
|
|
|
# define SAM_CONSOLE_2STOP CONFIG_USART0_2STOP
|
|
|
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# elif defined(CONFIG_USART1_SERIAL_CONSOLE)
|
|
|
|
# define SAM_CONSOLE_BASE SAM_USART1_BASE
|
|
|
|
# define SAM_CONSOLE_BAUD CONFIG_USART1_BAUD
|
|
|
|
# define SAM_CONSOLE_BITS CONFIG_USART1_BITS
|
|
|
|
# define SAM_CONSOLE_PARITY CONFIG_USART1_PARITY
|
|
|
|
# define SAM_CONSOLE_2STOP CONFIG_USART1_2STOP
|
|
|
|
# elif defined(CONFIG_USART2_SERIAL_CONSOLE)
|
|
|
|
# define SAM_CONSOLE_BASE SAM_USART2_BASE
|
|
|
|
# define SAM_CONSOLE_BAUD CONFIG_USART2_BAUD
|
|
|
|
# define SAM_CONSOLE_BITS CONFIG_USART2_BITS
|
|
|
|
# define SAM_CONSOLE_PARITY CONFIG_USART2_PARITY
|
|
|
|
# define SAM_CONSOLE_2STOP CONFIG_USART2_2STOP
|
|
|
|
# elif defined(CONFIG_USART3_SERIAL_CONSOLE)
|
|
|
|
# define SAM_CONSOLE_BASE SAM_USART3_BASE
|
|
|
|
# define SAM_CONSOLE_BAUD CONFIG_USART3_BAUD
|
|
|
|
# define SAM_CONSOLE_BITS CONFIG_USART3_BITS
|
|
|
|
# define SAM_CONSOLE_PARITY CONFIG_USART3_PARITY
|
|
|
|
# define SAM_CONSOLE_2STOP CONFIG_USART3_2STOP
|
|
|
|
# else
|
|
|
|
# error "No CONFIG_U[S]ARTn_SERIAL_CONSOLE Setting"
|
|
|
|
# endif
|
2010-01-17 18:55:13 +01:00
|
|
|
|
2010-01-21 03:35:34 +01:00
|
|
|
/* Select the settings for the mode register */
|
|
|
|
|
2014-03-22 17:18:06 +01:00
|
|
|
# if SAM_CONSOLE_BITS == 5
|
|
|
|
# define MR_CHRL_VALUE UART_MR_CHRL_5BITS /* 5 bits */
|
|
|
|
# elif SAM_CONSOLE_BITS == 6
|
|
|
|
# define MR_CHRL_VALUE UART_MR_CHRL_6BITS /* 6 bits */
|
|
|
|
# elif SAM_CONSOLE_BITS == 7
|
|
|
|
# define MR_CHRL_VALUE UART_MR_CHRL_7BITS /* 7 bits */
|
|
|
|
# elif SAM_CONSOLE_BITS == 8
|
|
|
|
# define MR_CHRL_VALUE UART_MR_CHRL_8BITS /* 8 bits */
|
|
|
|
# elif SAM_CONSOLE_BITS == 9 && !defined(CONFIG_UART0_SERIAL_CONSOLE) && \
|
|
|
|
!defined(CONFIG_UART1_SERIAL_CONSOLE)
|
|
|
|
# define MR_CHRL_VALUE UART_MR_MODE9
|
|
|
|
# else
|
|
|
|
# error "Invalid number of bits"
|
|
|
|
# endif
|
|
|
|
|
|
|
|
# if SAM_CONSOLE_PARITY == 1
|
|
|
|
# define MR_PAR_VALUE UART_MR_PAR_ODD
|
|
|
|
# elif SAM_CONSOLE_PARITY == 2
|
|
|
|
# define MR_PAR_VALUE UART_MR_PAR_EVEN
|
|
|
|
# else
|
|
|
|
# define MR_PAR_VALUE UART_MR_PAR_NONE
|
|
|
|
# endif
|
|
|
|
|
|
|
|
# if SAM_CONSOLE_2STOP != 0
|
|
|
|
# define MR_NBSTOP_VALUE UART_MR_NBSTOP_2
|
|
|
|
# else
|
|
|
|
# define MR_NBSTOP_VALUE UART_MR_NBSTOP_1
|
|
|
|
# endif
|
|
|
|
|
|
|
|
# define MR_VALUE (UART_MR_MODE_NORMAL | SAM_MR_USCLKS | \
|
|
|
|
MR_CHRL_VALUE | MR_PAR_VALUE | MR_NBSTOP_VALUE)
|
|
|
|
|
|
|
|
#endif /* HAVE_CONSOLE */
|
2010-01-21 03:35:34 +01:00
|
|
|
|
2015-10-03 01:42:29 +02:00
|
|
|
/****************************************************************************
|
2010-01-17 18:55:13 +01:00
|
|
|
* Private Types
|
2015-10-03 01:42:29 +02:00
|
|
|
****************************************************************************/
|
2010-01-17 18:55:13 +01:00
|
|
|
|
2015-10-03 01:42:29 +02:00
|
|
|
/****************************************************************************
|
2010-01-17 18:55:13 +01:00
|
|
|
* Private Function Prototypes
|
2015-10-03 01:42:29 +02:00
|
|
|
****************************************************************************/
|
2010-01-17 18:55:13 +01:00
|
|
|
|
2015-10-03 01:42:29 +02:00
|
|
|
/****************************************************************************
|
|
|
|
* Public Data
|
|
|
|
****************************************************************************/
|
2010-01-17 18:55:13 +01:00
|
|
|
|
2015-10-03 01:42:29 +02:00
|
|
|
/****************************************************************************
|
2016-02-22 01:06:09 +01:00
|
|
|
* Private Data
|
2015-10-03 01:42:29 +02:00
|
|
|
****************************************************************************/
|
2010-01-17 18:55:13 +01:00
|
|
|
|
2015-10-03 01:42:29 +02:00
|
|
|
/****************************************************************************
|
2010-01-17 18:55:13 +01:00
|
|
|
* Private Functions
|
2015-10-03 01:42:29 +02:00
|
|
|
****************************************************************************/
|
2010-01-17 18:55:13 +01:00
|
|
|
|
2015-10-03 01:42:29 +02:00
|
|
|
/****************************************************************************
|
2010-01-17 18:55:13 +01:00
|
|
|
* Public Functions
|
2015-10-03 01:42:29 +02:00
|
|
|
****************************************************************************/
|
2010-01-17 18:55:13 +01:00
|
|
|
|
2015-10-03 01:42:29 +02:00
|
|
|
/****************************************************************************
|
2020-05-01 16:50:23 +02:00
|
|
|
* Name: arm_lowputc
|
2010-01-17 18:55:13 +01:00
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Output one byte on the serial console
|
|
|
|
*
|
2015-10-03 01:42:29 +02:00
|
|
|
****************************************************************************/
|
2010-01-17 18:55:13 +01:00
|
|
|
|
2020-05-01 16:50:23 +02:00
|
|
|
void arm_lowputc(char ch)
|
2010-01-17 18:55:13 +01:00
|
|
|
{
|
2014-03-22 17:18:06 +01:00
|
|
|
#ifdef HAVE_CONSOLE
|
2014-03-25 19:44:03 +01:00
|
|
|
irqstate_t flags;
|
2010-01-21 03:35:34 +01:00
|
|
|
|
2015-10-07 19:39:06 +02:00
|
|
|
for (; ; )
|
2014-03-25 19:44:03 +01:00
|
|
|
{
|
|
|
|
/* Wait for the transmitter to be available */
|
2010-01-21 03:35:34 +01:00
|
|
|
|
2014-03-25 21:34:07 +01:00
|
|
|
while ((getreg32(SAM_CONSOLE_BASE + SAM_UART_SR_OFFSET) &
|
|
|
|
UART_INT_TXEMPTY) == 0);
|
2010-01-21 03:35:34 +01:00
|
|
|
|
2014-03-25 19:44:03 +01:00
|
|
|
/* Disable interrupts so that the test and the transmission are
|
|
|
|
* atomic.
|
|
|
|
*/
|
|
|
|
|
2016-02-14 02:11:09 +01:00
|
|
|
flags = enter_critical_section();
|
2014-03-25 21:34:07 +01:00
|
|
|
if ((getreg32(SAM_CONSOLE_BASE + SAM_UART_SR_OFFSET) &
|
|
|
|
UART_INT_TXEMPTY) != 0)
|
2014-03-25 19:44:03 +01:00
|
|
|
{
|
|
|
|
/* Send the character */
|
|
|
|
|
|
|
|
putreg32((uint32_t)ch, SAM_CONSOLE_BASE + SAM_UART_THR_OFFSET);
|
2016-02-14 02:11:09 +01:00
|
|
|
leave_critical_section(flags);
|
2015-06-22 14:19:45 +02:00
|
|
|
return;
|
2014-03-25 19:44:03 +01:00
|
|
|
}
|
|
|
|
|
2016-02-14 02:11:09 +01:00
|
|
|
leave_critical_section(flags);
|
2014-03-25 19:44:03 +01:00
|
|
|
}
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
* Name: up_putc
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Provide priority, low-level access to support OS debug writes
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
int up_putc(int ch)
|
|
|
|
{
|
|
|
|
#ifdef HAVE_CONSOLE
|
|
|
|
/* Check for LF */
|
|
|
|
|
|
|
|
if (ch == '\n')
|
|
|
|
{
|
|
|
|
/* Add CR */
|
|
|
|
|
2020-05-01 16:50:23 +02:00
|
|
|
arm_lowputc('\r');
|
2014-03-25 19:44:03 +01:00
|
|
|
}
|
|
|
|
|
2020-05-01 16:50:23 +02:00
|
|
|
arm_lowputc(ch);
|
2014-03-22 17:18:06 +01:00
|
|
|
#endif
|
2014-03-25 19:44:03 +01:00
|
|
|
return ch;
|
2010-01-17 18:55:13 +01:00
|
|
|
}
|
|
|
|
|
2015-10-03 01:42:29 +02:00
|
|
|
/****************************************************************************
|
2013-06-02 21:04:40 +02:00
|
|
|
* Name: sam_lowsetup
|
2010-01-17 18:55:13 +01:00
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* This performs basic initialization of the USART used for the serial
|
2019-08-04 22:50:28 +02:00
|
|
|
* console. Its purpose is to get the console output available as soon
|
2010-01-17 18:55:13 +01:00
|
|
|
* as possible.
|
|
|
|
*
|
2015-10-03 01:42:29 +02:00
|
|
|
****************************************************************************/
|
2010-01-17 18:55:13 +01:00
|
|
|
|
2013-06-02 21:04:40 +02:00
|
|
|
void sam_lowsetup(void)
|
2010-01-17 18:55:13 +01:00
|
|
|
{
|
2010-01-21 03:52:06 +01:00
|
|
|
/* Enable clocking for all selected UART/USARTs */
|
2010-01-17 18:55:13 +01:00
|
|
|
|
2013-06-11 00:18:47 +02:00
|
|
|
#ifdef CONFIG_SAM34_UART0
|
2013-06-11 22:32:07 +02:00
|
|
|
sam_uart0_enableclk();
|
|
|
|
#endif
|
|
|
|
#ifdef CONFIG_SAM34_UART1
|
|
|
|
sam_uart1_enableclk();
|
2010-01-21 03:35:34 +01:00
|
|
|
#endif
|
2013-06-02 18:33:57 +02:00
|
|
|
#ifdef CONFIG_SAM34_USART0
|
2013-06-08 21:50:42 +02:00
|
|
|
sam_usart0_enableclk();
|
2010-01-21 03:35:34 +01:00
|
|
|
#endif
|
2013-06-02 18:33:57 +02:00
|
|
|
#ifdef CONFIG_SAM34_USART1
|
2013-06-08 21:50:42 +02:00
|
|
|
sam_usart1_enableclk();
|
2010-01-21 03:35:34 +01:00
|
|
|
#endif
|
2013-06-02 18:33:57 +02:00
|
|
|
#ifdef CONFIG_SAM34_USART2
|
2013-06-08 21:50:42 +02:00
|
|
|
sam_usart2_enableclk();
|
2010-01-21 03:35:34 +01:00
|
|
|
#endif
|
2013-06-02 18:33:57 +02:00
|
|
|
#ifdef CONFIG_SAM34_USART3
|
2013-06-08 21:50:42 +02:00
|
|
|
sam_usart3_enableclk();
|
2010-01-21 03:35:34 +01:00
|
|
|
#endif
|
|
|
|
|
2010-01-21 03:52:06 +01:00
|
|
|
/* Configure UART pins for all selected UART/USARTs */
|
2013-06-02 18:33:57 +02:00
|
|
|
|
2013-06-11 00:18:47 +02:00
|
|
|
#ifdef CONFIG_SAM34_UART0
|
2020-01-02 17:49:34 +01:00
|
|
|
sam_configgpio(GPIO_UART0_RXD);
|
|
|
|
sam_configgpio(GPIO_UART0_TXD);
|
2010-01-21 03:52:06 +01:00
|
|
|
#endif
|
2013-06-08 21:50:42 +02:00
|
|
|
|
2013-06-12 16:18:42 +02:00
|
|
|
#ifdef CONFIG_SAM34_UART1
|
2020-01-02 17:49:34 +01:00
|
|
|
sam_configgpio(GPIO_UART1_RXD);
|
|
|
|
sam_configgpio(GPIO_UART1_TXD);
|
2013-06-12 16:18:42 +02:00
|
|
|
#endif
|
|
|
|
|
2013-06-02 18:33:57 +02:00
|
|
|
#ifdef CONFIG_SAM34_USART0
|
2020-01-02 17:49:34 +01:00
|
|
|
sam_configgpio(GPIO_USART0_RXD);
|
|
|
|
sam_configgpio(GPIO_USART0_TXD);
|
2013-06-08 21:50:42 +02:00
|
|
|
#ifdef CONFIG_USART0_OFLOWCONTROL
|
2020-01-02 17:49:34 +01:00
|
|
|
sam_configgpio(GPIO_USART0_CTS);
|
2013-06-08 21:50:42 +02:00
|
|
|
#endif
|
|
|
|
#ifdef CONFIG_USART0_IFLOWCONTROL
|
2020-01-02 17:49:34 +01:00
|
|
|
sam_configgpio(GPIO_USART0_RTS);
|
2010-01-21 03:52:06 +01:00
|
|
|
#endif
|
2013-06-08 21:50:42 +02:00
|
|
|
#endif
|
|
|
|
|
2013-06-02 18:33:57 +02:00
|
|
|
#ifdef CONFIG_SAM34_USART1
|
2020-01-02 17:49:34 +01:00
|
|
|
sam_configgpio(GPIO_USART1_RXD);
|
|
|
|
sam_configgpio(GPIO_USART1_TXD);
|
2013-06-08 21:50:42 +02:00
|
|
|
#ifdef CONFIG_USART1_OFLOWCONTROL
|
2020-01-02 17:49:34 +01:00
|
|
|
sam_configgpio(GPIO_USART1_CTS);
|
2013-06-08 21:50:42 +02:00
|
|
|
#endif
|
|
|
|
#ifdef CONFIG_USART1_IFLOWCONTROL
|
2020-01-02 17:49:34 +01:00
|
|
|
sam_configgpio(GPIO_USART1_RTS);
|
2010-01-21 03:52:06 +01:00
|
|
|
#endif
|
2013-06-08 21:50:42 +02:00
|
|
|
#endif
|
|
|
|
|
2013-06-02 18:33:57 +02:00
|
|
|
#ifdef CONFIG_SAM34_USART2
|
2020-01-02 17:49:34 +01:00
|
|
|
sam_configgpio(GPIO_USART2_RXD);
|
|
|
|
sam_configgpio(GPIO_USART2_TXD);
|
2013-06-08 21:50:42 +02:00
|
|
|
#ifdef CONFIG_USART2_OFLOWCONTROL
|
2020-01-02 17:49:34 +01:00
|
|
|
sam_configgpio(GPIO_USART2_CTS);
|
2013-06-08 21:50:42 +02:00
|
|
|
#endif
|
|
|
|
#ifdef CONFIG_USART2_IFLOWCONTROL
|
2020-01-02 17:49:34 +01:00
|
|
|
sam_configgpio(GPIO_USART2_RTS);
|
2010-01-21 03:52:06 +01:00
|
|
|
#endif
|
2013-06-08 21:50:42 +02:00
|
|
|
#endif
|
|
|
|
|
2013-06-02 18:33:57 +02:00
|
|
|
#ifdef CONFIG_SAM34_USART3
|
2020-01-02 17:49:34 +01:00
|
|
|
sam_configgpio(GPIO_USART3_RXD);
|
|
|
|
sam_configgpio(GPIO_USART3_TXD);
|
2013-06-08 21:50:42 +02:00
|
|
|
#ifdef CONFIG_USART3_OFLOWCONTROL
|
2020-01-02 17:49:34 +01:00
|
|
|
sam_configgpio(GPIO_USART3_CTS);
|
2010-01-21 03:35:34 +01:00
|
|
|
#endif
|
2013-06-08 21:50:42 +02:00
|
|
|
#ifdef CONFIG_USART3_IFLOWCONTROL
|
2020-01-02 17:49:34 +01:00
|
|
|
sam_configgpio(GPIO_USART3_RTS);
|
2010-01-21 03:35:34 +01:00
|
|
|
#endif
|
|
|
|
#endif
|
|
|
|
|
|
|
|
/* Configure the console (only) */
|
2010-01-22 04:08:29 +01:00
|
|
|
#if defined(HAVE_CONSOLE) && !defined(CONFIG_SUPPRESS_UART_CONFIG)
|
2010-01-21 03:35:34 +01:00
|
|
|
/* Reset and disable receiver and transmitter */
|
|
|
|
|
2013-06-02 18:33:57 +02:00
|
|
|
putreg32((UART_CR_RSTRX | UART_CR_RSTTX | UART_CR_RXDIS | UART_CR_TXDIS),
|
|
|
|
SAM_CONSOLE_BASE + SAM_UART_CR_OFFSET);
|
2010-01-21 03:35:34 +01:00
|
|
|
|
|
|
|
/* Disable all interrupts */
|
|
|
|
|
2013-06-02 18:33:57 +02:00
|
|
|
putreg32(0xffffffff, SAM_CONSOLE_BASE + SAM_UART_IDR_OFFSET);
|
2010-01-21 03:35:34 +01:00
|
|
|
|
|
|
|
/* Set up the mode register */
|
|
|
|
|
2013-06-02 18:33:57 +02:00
|
|
|
putreg32(MR_VALUE, SAM_CONSOLE_BASE + SAM_UART_MR_OFFSET);
|
2010-01-21 03:35:34 +01:00
|
|
|
|
2013-06-09 18:57:42 +02:00
|
|
|
/* Configure the console baud. NOTE: Oversampling by 8 is not supported.
|
|
|
|
* This may limit BAUD rates for lower USART clocks.
|
|
|
|
*/
|
2010-01-21 03:35:34 +01:00
|
|
|
|
2021-03-24 09:35:15 +01:00
|
|
|
putreg32(((SAM_USART_CLOCK + (SAM_CONSOLE_BAUD << 3)) /
|
|
|
|
(SAM_CONSOLE_BAUD << 4)),
|
|
|
|
SAM_CONSOLE_BASE + SAM_UART_BRGR_OFFSET);
|
2010-01-21 03:35:34 +01:00
|
|
|
|
|
|
|
/* Enable receiver & transmitter */
|
|
|
|
|
2013-06-02 18:33:57 +02:00
|
|
|
putreg32((UART_CR_RXEN | UART_CR_TXEN),
|
|
|
|
SAM_CONSOLE_BASE + SAM_UART_CR_OFFSET);
|
2010-01-21 03:35:34 +01:00
|
|
|
#endif
|
2010-01-17 18:55:13 +01:00
|
|
|
}
|