Commit Graph

1396 Commits

Author SHA1 Message Date
Tiago Medicci Serrano
8673e659b4 espressif: quiet git commands and improve build logging
Add `--quiet` to git commands to avoid unnecessary logging during
the operation and add summarized logs to show progress.
2023-07-27 19:43:48 -07:00
Tiago Medicci Serrano
8e343405a2 espressif: update esp-hal-3rdparty
The esp-hal-3rdparty release include general bugfixes.
2023-07-27 19:43:48 -07:00
hujun5
68187b68af arch: move [enter|leave]_critical_section
move [enter|leave]_critical_section to the same place for easy to understand
and call matching

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2023-07-27 11:34:09 +02:00
Xiang Xiao
46b25b3849 arch: Compute the array size by nitems
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-07-26 09:33:38 +02:00
Xiang Xiao
f3269a6caa sched: Rename DEBUG_TCBINFO to ARCH_HAVE_TCBINFO
and select if the arch support to define g_tcbinfo variable

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-07-26 09:33:38 +02:00
Tiago Medicci Serrano
dacb4e87b6 espressif: get esp-hal-3rdparty sources based on its version
Clone the esp-hal-3rdparty repository and, then, checkout to a
specific version (usually indicated by the commit SHA) instead of
using a branch as the HEAD.
2023-07-25 09:44:59 -07:00
zhangyuan21
9792211b96 sched/tcbinfo: add stack info to tcbinfo
Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2023-07-24 09:47:12 -07:00
Victor Benso
0c5145b7d1 New implementation of the ESP32's RMT driver. 2023-07-23 16:17:57 -03:00
chao an
4b94dc3092 toolchain/gcc: fix linker error if enable STACK_CANARIES/LTO at same time
If -fstack-protector-all is enabled, gcc linker will need GCC
SSP(Stack Smashing Protector) support, Since the implement of SSP
is related to the OS, most of embedded toolchain does not provide
ssp support, so an error will be reported when linking:

enable CONFIG_LTO_FULL && CONFIG_STACK_CANARIES

arm-none-eabi/bin/ld: cannot find -lssp_nonshared: No such file or directory
arm-none-eabi/bin/ld: cannot find -lssp: No such file or directory

https://github.com/gcc-mirror/gcc/blob/master/gcc/gcc.cc#L983-L985

Since nuttx has already implemented SSP related hook functions,
so in this PR, we filter out this option in the link phase to ensure that
the implementation of lssp/lssp_nonshared will not be referenced

Signed-off-by: chao an <anchao@xiaomi.com>
2023-07-21 01:13:34 +08:00
Xiang Xiao
abfe082a6f Kconfig: Simplify the conditional default statement
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-07-16 14:39:20 -03:00
simbit18
b0965ab963 Fix nuttx coding style
Remove TABs
Fix indentation
Fix Multi-line comments
Fix Comments to the Right of Statements.
2023-07-14 01:16:06 +08:00
simbit18
1b1ac6f3b7 Fix nuttx coding style
Remove TABs
Fix indentation
Fix Multi-line comments
Fix Comments to the Right of Statements.

Fix nuttx coding style

Fix Comments to the Right of Statements.
2023-07-13 19:30:56 +08:00
chenrun1
4d285cb14d xtensa_saveusercontext:Leave the context information empty
In the current implementation of other architectures, it is not really implemented to preserve the context, so it is emulated from other architectures to clear the context.
If this behavior is not implemented, it will cause the xtensa architecture processor to loop assert in the active assert case

Signed-off-by: chenrun1 <chenrun1@xiaomi.com>
2023-07-13 09:48:46 +08:00
rongyichang
5d7864fbcb drivers/spi: add support for qspi hwfeatures
add QSPI_BITORDER and QSPI_WORD_REVERSE hwfeatures

Signed-off-by: rongyichang <rongyichang@xiaomi.com>
2023-07-12 01:42:25 +08:00
Alan Carvalho de Assis
1d88d5a370 ESP32S2: Add support to SPI Flash 2023-07-10 17:56:46 +08:00
Roy Feng
8f66b033db change free to kmm_free as it was allocated via kmm_alloc 2023-07-05 16:40:23 +08:00
Alan Carvalho de Assis
245db6742c esp32s2: Fix UART1 default pins
The default pins to UART1 should be 17 (TXD) and 18 (RXD).
2023-07-01 13:11:39 +08:00
Xiang Xiao
0eeca0f375 build: Replace "$(shell $(INCDIR) $(CC) ...)" with $(INCDIR_PREFIX)
to unify the way to get include directories

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-06-23 00:11:25 +03:00
simbit18
f0a74eb492 Fix Kconfig style
Remove spaces from Kconfig files
2023-06-22 11:46:09 +09:00
simbit18
f930b4f6f5 Fix Kconfig style
Remove TABs from Kconfig files
Replace help => ---help---
Add comments
2023-06-20 12:54:50 -03:00
simbit18
3f4151525d Fix Kconfig style
Remove TABs from Kconfig files
Add comments
2023-06-19 20:05:57 +03:00
Dong Heng
8f25329260 xtensa/esp32s3: SPI support quad I/O mode 2023-06-16 16:07:05 -03:00
Tiago Medicci Serrano
368b6cb489 esp32s3/wifi: update Wi-Fi driver to the newest esp-hal-3rdparty 2023-06-16 11:14:36 +08:00
Dong Heng
d492823128 xtensa/esp32s3: Add USB OTG device driver 2023-06-14 18:04:27 -03:00
Lucas Saavedra Vaz
4bcf454ae5 arch/xtensa/esp32s2: Fix SPI DMA implementation 2023-06-15 03:29:30 +08:00
Dong Heng
b24f931aca xtensa/esp32s3: Support 32MB SPI flash 2023-06-12 21:05:33 +08:00
Xiang Xiao
da5e978341 mm: Correct the callsite of mm_mallinfo
forget to update in https://github.com/apache/nuttx/pull/9488

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-06-11 19:37:04 +03:00
Xiang Xiao
d920bfba10 mm: include malloc.h in mm/mm.h
to remove the forward declaration of mallinfo and mallinfo_task

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-06-11 19:37:04 +03:00
Petro Karashchenko
2a38c38b03 style: fix style issues found during code review
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2023-06-11 12:54:52 +08:00
anjiahao
7732791cd6 mempool:Add mail_info support for multiple pools
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2023-06-08 23:56:40 +08:00
chenwen@espressif.com
617927f27c xtensa/esp32: Support multiple PHY init data bin
Signed-off-by: chenwen@espressif.com <chenwen@espressif.com>
2023-06-07 16:44:26 +08:00
Tiago Medicci Serrano
118a127771 esp32_start: use up_putc instead up_puts in showprogress define
During initialization it isn't possible to use up_puts once it's
protected against concurrent access through a mutex lock. Instead,
using up_putc makes it similar to ESP32S2 and ESP32S3 and perfectly
fits for showprogress usage.
2023-06-02 10:17:54 +08:00
Roy Feng
bcd776b2a7 Fix build issues for ESP32 SoftAP mode 2023-05-27 23:54:55 +09:00
Dong Heng
97d2d6376d xtensa/esp32s3: SPI slave driver 2023-05-27 14:11:36 +08:00
liaoao
6424b5322f procfs:add xtensa cpuinfo
Signed-off-by: liaoao <liaoao@xiaomi.com>
2023-05-27 03:29:41 +08:00
Lucas Saavedra Vaz
5f1dca63ae arch/xtensa/esp32: Add missing SPI Flash ROM functions
Add missing ROM functions and clear source files
2023-05-27 03:16:20 +08:00
Dong Heng
4a279b4b9b xtensa/esp32s3: Support 32MB PSRAM 2023-05-25 13:46:11 +08:00
Tiago Medicci Serrano
63364a52ff esp32s3/spiflash: pause other CPU before SPI flash operations
Whenever a SPI flash operation is going to take place, it's
necessary to disable both the instruction and data cache. In order
to avoid the other CPU (if SMP is enabled) to retrieve data from
the SPI flash, it needs to be paused until the current SPI flash
operation finishes. All the code that "pauses" the other CPU (in
fact, the CPU spins until `up_cpu_resume` is called) needs to run
from the instruction RAM.
2023-05-24 00:37:46 +08:00
hujun5
35b597ec2c arch/all: in smp pthread_cancel occasionally deadlock except for arm64
please reference the issue here for more information:
https://github.com/apache/nuttx/pull/9065

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2023-05-23 15:48:35 +09:00
Xiang Xiao
7990f90915 Indent the define statement by two spaces
follow the code style convention

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-05-21 09:52:08 -03:00
zhangyuan21
077c16fc71 arch/xtensa: only cmp fpu coprocessor for fpu test
Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2023-05-18 17:30:38 +08:00
Xiang Xiao
7dc0d70092 arch: Save sigdeliver into xcp in the case of signal self delevery
to avoid the infinite recusive dispatch:
*0  myhandler (signo=27, info=0xf3e38b9c, context=0x0) at ltp/testcases/open_posix_testsuite/conformance/interfaces/sigqueue/7-1.c:39
*1  0x58f1c39e in nxsig_deliver (stcb=0xf4e20f40) at signal/sig_deliver.c:167
*2  0x58fa0664 in up_schedule_sigaction (tcb=0xf4e20f40, sigdeliver=0x58f1bab5 <nxsig_deliver>) at sim/sim_schedulesigaction.c:88
*3  0x58f19907 in nxsig_queue_action (stcb=0xf4e20f40, info=0xf4049334) at signal/sig_dispatch.c:115
*4  0x58f1b089 in nxsig_tcbdispatch (stcb=0xf4e20f40, info=0xf4049334) at signal/sig_dispatch.c:435
*5  0x58f31853 in nxsig_unmask_pendingsignal () at signal/sig_unmaskpendingsignal.c:104
*6  0x58f1ca09 in nxsig_deliver (stcb=0xf4e20f40) at signal/sig_deliver.c:199
*7  0x58fa0664 in up_schedule_sigaction (tcb=0xf4e20f40, sigdeliver=0x58f1bab5 <nxsig_deliver>) at sim/sim_schedulesigaction.c:88
*8  0x58f19907 in nxsig_queue_action (stcb=0xf4e20f40, info=0xf4049304) at signal/sig_dispatch.c:115
*9  0x58f1b089 in nxsig_tcbdispatch (stcb=0xf4e20f40, info=0xf4049304) at signal/sig_dispatch.c:435
*10 0x58f31853 in nxsig_unmask_pendingsignal () at signal/sig_unmaskpendingsignal.c:104
*11 0x58f1ca09 in nxsig_deliver (stcb=0xf4e20f40) at signal/sig_deliver.c:199
*12 0x58fa0664 in up_schedule_sigaction (tcb=0xf4e20f40, sigdeliver=0x58f1bab5 <nxsig_deliver>) at sim/sim_schedulesigaction.c:88
*13 0x58f19907 in nxsig_queue_action (stcb=0xf4e20f40, info=0xf40492d4) at signal/sig_dispatch.c:115
*14 0x58f1b089 in nxsig_tcbdispatch (stcb=0xf4e20f40, info=0xf40492d4) at signal/sig_dispatch.c:435
*15 0x58f31853 in nxsig_unmask_pendingsignal () at signal/sig_unmaskpendingsignal.c:104
*16 0x58f1ca09 in nxsig_deliver (stcb=0xf4e20f40) at signal/sig_deliver.c:199
*17 0x58fa0664 in up_schedule_sigaction (tcb=0xf4e20f40, sigdeliver=0x58f1bab5 <nxsig_deliver>) at sim/sim_schedulesigaction.c:88
*18 0x58f19907 in nxsig_queue_action (stcb=0xf4e20f40, info=0xf40492a4) at signal/sig_dispatch.c:115
*19 0x58f1b089 in nxsig_tcbdispatch (stcb=0xf4e20f40, info=0xf40492a4) at signal/sig_dispatch.c:435
*20 0x58f31853 in nxsig_unmask_pendingsignal () at signal/sig_unmaskpendingsignal.c:104
*21 0x58f1ca09 in nxsig_deliver (stcb=0xf4e20f40) at signal/sig_deliver.c:199
*22 0x58fa0664 in up_schedule_sigaction (tcb=0xf4e20f40, sigdeliver=0x58f1bab5 <nxsig_deliver>) at sim/sim_schedulesigaction.c:88
*23 0x58f19907 in nxsig_queue_action (stcb=0xf4e20f40, info=0xf4049274) at signal/sig_dispatch.c:115
*24 0x58f1b089 in nxsig_tcbdispatch (stcb=0xf4e20f40, info=0xf4049274) at signal/sig_dispatch.c:435
*25 0x58f31853 in nxsig_unmask_pendingsignal () at signal/sig_unmaskpendingsignal.c:104
*26 0x58f1ca09 in nxsig_deliver (stcb=0xf4e20f40) at signal/sig_deliver.c:199
*27 0x58fa0664 in up_schedule_sigaction (tcb=0xf4e20f40, sigdeliver=0x58f1bab5 <nxsig_deliver>) at sim/sim_schedulesigaction.c:88
*28 0x58f19907 in nxsig_queue_action (stcb=0xf4e20f40, info=0xf4049244) at signal/sig_dispatch.c:115
*29 0x58f1b089 in nxsig_tcbdispatch (stcb=0xf4e20f40, info=0xf4049244) at signal/sig_dispatch.c:435
*30 0x58f31853 in nxsig_unmask_pendingsignal () at signal/sig_unmaskpendingsignal.c:104
*31 0x58f1ca09 in nxsig_deliver (stcb=0xf4e20f40) at signal/sig_deliver.c:199

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-05-17 11:53:18 -06:00
Tiago Medicci Serrano
496a77653a arch/xtensa/esp32_esp32s3: prevent arch's libc in the userspace
ESP32 and ESP32-S3 should use the ROM-defined versions of the libc
in flat build and, when building the protected mode, in the kernel.

The ROM-defined version of the libc functions can't be used in the
userspace, however, because it isn't allowed to access the memory
region in flash directly from the userspace. That being said,
`LIBC_PREVENT_STRING_KERNEL` should be selected to avoid building
any implementation of the libc, being the ROM-defined versions
linked instead.

NuttX's software implemented version of the libc will be built in
the userspace. Also, the assembly-defined version of some of the
libc functions (`XTENSA_xxx`) may also be selected to be used in
the userspace.
2023-05-17 13:58:48 +08:00
Alan Carvalho de Assis
694e6f550b esp32xx: Workaround to avoid printing serial trash character
During the serial reconfiguration from bootloader to the
NuttX a trash character "?" (Unicode replacement U+FFFD)
was printed in the screen.

This fix was discovered by Sylvio Alves from Espressif!
2023-05-12 06:30:35 +03:00
Tiago Medicci Serrano
3e07477c85 esp32/wifi: use wapis init config to save Wi-Fi data
Instead of using Espressif's emulated NVS to save Wi-Fi data, use
`wapi`s wireless configure initialization mechanism for saving
Wi-Fi data. It 1) avoids creating a specific storage partition
just to save Wi-Fi data (ESP32's storage partition is used
instead); 2) avoids initialization problems of the emulated NVS
when SMP is enabled (the Wi-Fi driver tries to initialize it before
the actual partition is initialized); and 3) enables reconnecting
using `wapi reconnect` command and connect the device automatically
on bringup if `CONFIG_NETUTILS_NETINIT` is selected.
2023-05-12 01:09:09 +08:00
Tiago Medicci Serrano
b680abd04b esp32s3/wifi: use wapis init config to save Wi-Fi data
Instead of using Espressif's emulated NVS to save Wi-Fi data, use
`wapi`s wireless configure initialization mechanism for saving
Wi-Fi data. It 1) avoids creating a specific storage partition
just to save Wi-Fi data (ESP32-S3's storage partition is used
instead); 2) avoids initialization problems of the emulated NVS
when SMP is enabled (the Wi-Fi driver tries to initialize it before
the actual partition is initialized); and 3) enables reconnecting
using `wapi reconnect` command and connect the device automatically
on bringup if `CONFIG_NETUTILS_NETINIT` is selected.
2023-05-12 01:09:09 +08:00
Lucas Saavedra Vaz
a895cd4854 arch/xtensa/esp32s2: Define syscall table to enable using ROM functions
This commit aims to enable the use of ROM functions on ESP32-S2.
This is done by creating the required syscall stubs table and adding the missing symbols to the linker script.
2023-05-10 15:39:44 -03:00
Lucas Saavedra Vaz
274a79fd34 arch/xtensa/esp32: Define syscall table to enable using ROM functions
This commit aims to enable the use of ROM functions on ESP32.
This is done by creating the required syscall stubs table and adding the missing symbols to the linker script.
2023-05-10 15:39:44 -03:00
simbit18
f5514a1113 arch/xtensa/src/esp32/Kconfig: Fix Kconfig style
Remove spaces from Kconfig files
Add TABs
2023-05-10 22:51:11 +08:00
Dong Heng
9ae2fa2b54 xtensa/esp32s3: Fix code style of esp32s3_psram_octal.c 2023-05-10 10:55:20 -03:00