According to `Documentation/guides/gdbwithpython.rst` and GDB's
documentation, the `-ix` option "Execute commands from file `file`
before loading the inferior (but after loading gdbinit files)",
being the correct way of loading it to GDB.
This PR adds support for PINE64 Star64 64-bit RISC-V SBC, based on StarFive JH7110 SoC. Most of the code is derived from NuttX for QEMU RISC-V (Kernel Mode). [The source files are explained in the articles here](https://github.com/lupyuen/nuttx-star64)
Modified Files:
boards/Kconfig: Added Star64 board
New Files in boards/risc-v/jh7110/star64:
src/jh7110_appinit.c: Startup Code
include/board.h: Star64 Definitions
include/board_memorymap.h: Memory Map
src/etc/init.d/rc.sysinit, rcS: Startup Script
src/.gitignore: Ignore the tmp filesystem
scripts/ld.script: Linker Script
scripts/Make.defs: Star64 Makefile
src/Makefile: Star64 Makefile
Kconfig: Star64 Config
configs/nsh/defconfig: NSH Build Config
Updated Documentation:
introduction/detailed_support.rst: Added StarFive JH7110 SoC and Star64 SBC
platforms/risc-v/jh7110/index.rst: New page for StarFive JH7110 SoC
platforms/risc-v/jh7110/boards/star64/index.rst: Building and booting NuttX for Star64
Add documentation referring to sim:alsa defconfig, about how to
mount host system files in the simulator using `hostfs` and
playing them using the ALSA adapter.
support to control the opening or closing of the specified channel through the syslogmask command at runtime
Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
use PTHREAD_CLEANUP_STACKSIZE to enable or disable interfaces pthread_cleanup_push() and pthread_cleanup_pop().
reasons:(1)same as TLS_TASK_NELEM (2)it is no need to use two variables
Signed-off-by: yanghuatao <yanghuatao@xiaomi.com>
* Documentation/guides/cortexmhardfaults.rst:
New. Migrated from [1] with conversion to reStructuredText,
minor typo fixes, and a link to a Narkive archive of the
original quoted question.
* Documentation/guides/index.rst:
Add above to TOC.
[1] https://cwiki.apache.org/confluence/display/NUTTX/Analyzing+Cortex-M+Hardfaults
* Documentation/guides/nestedinterrupts.rst:
New. Imported from [1] and converted from CWIKI to reStructuredText.
* Documentation/guides/index.rst:
Link to the new page.
* Documentation/guides/zerolatencyinterrupts.rst:
Replace link to the CWIKI Nested Interrupts page with link to the
above.
[1] https://cwiki.apache.org/confluence/display/NUTTX/Nested+Interrupts
* Documentation/guides/zerolatencyinterrupts.rst:
Add paragraph that defines jitter. Fix a few minor typos. Fix
incorrect reStructuredText formatting for bulletpoints (they were
being rendered like 2nd level bulletpoints).
* Documentation/guides/index.rst:
Add zerolatencyinterrupts.rst to the TOC, which I forgot to do in PR
# 9302.
- NewReno congestion control algorithm is used to solve the problem
of network congestion breakdown. NewReno congestion control includes
slow start, collision avoidance, fast retransmission, and fast
recovery. The implementation refers to RFC6582 and RFC5681.
- In addition, we optimize the congestion algorithm. In the conflict
avoidance stage, the maximum congestion window max_cwnd is used to
limit the excessive growth of cwnd and prevent network jitter
caused by congestion. Maximum congestion window max_cwnd is updated
with the current congestion window cwnd and the update weight is
0.875 when an RTO timeout occurs.
Signed-off-by: liqinhui <liqinhui@xiaomi.com>
This implements the changes required to genreate the pdf version
of the documentation. The pdf will be generated as a build artifact
attached to the build. This is the first patch to enable this
a follow on patch to the website repo will publish the pdf to the
NuttX website.
Currently only Port UART0 is supported for Allwinner A64. This PR adds support for all UART Ports: UART1 to UART4. (Except R-UART, which is a special low-power UART)
This is required for the upcoming LTE Modem Driver (Quectel EG25-G) for PINE64 PinePhone, which uses UART3. [(Details here)](https://lupyuen.github.io/articles/lte2)
The code was adapted from the NuttX UART Driver for Allwinner A1X: [`a1x_serial.c`](https://github.com/apache/nuttx/blob/master/arch/arm/src/a1x/a1x_serial.c)
`arch/arm64/src/a64/a64_serial.c`: Added ports UART1 to UART4, based on [`a1x_serial.c`](https://github.com/apache/nuttx/blob/master/arch/arm/src/a1x/a1x_serial.c)
`arch/arm64/src/a64/a64_serial.h`: Added IRQs for UART1 to UART4. Moved UART Base Addresses to `a64_memorymap.h`
`arch/arm64/src/a64/hardware/a64_memorymap.h`: Added UART Base Addresses for UART0 to UART4
`arch/arm64/src/a64/Kconfig`: Added UART1 to UART4 to Allwinner A64 Peripheral Selection menu
`boards/arm64/a64/pinephone/configs/lcd/defconfig`, `lvgl/defconfig`, `nsh/defconfig`, `sensor/defconfig`: Fixed `UART1_SERIAL_CONSOLE` to `UART0_SERIAL_CONSOLE`
Adds support for the ES8311 codec on the ESP32-S2-Kaluga-1 board. This commit also adds basic configurations for testing and updates the board documentation.
Added examples of using the RTP Tools (`rtpdump`, in particular)
to receive RTP packets and 1) print the data and/or 2) playback
audio content through I2S.
This commit adds support to Ai-Thinker ESP32 Audio Kit V2.2 A247
board.
There are two modules of this board. The old model uses AC101 audio
and is not supported currently (AFAIK there is no AC101 driver) and
the new version uses the ES8388 audio codec. This model is supported
by this commit.
Just read the documentation to test playing an audio file.
TODO: Test audio recording.
Initial documentation page for SAMv7 MCU is added. There are still
board pages to be added in the future.
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
Updating Simulator for macOS
macOS requires genromfs and X11 Libraries to run Simulators.
* Added instructions to install genromfs
* Added instructions to install X11
Adding Xorg Server
The linker was unable to identify the location of X11 libraries.
removed -L/opt/X11/lib from ln 145
Updating Changes to streamline with other Hosts
Current implementation supports the trigger generation only from timer
capture on period value. This is sufficient for PWM synchronization but
may not be enough for other purposes as ADC triggering for example.
This change adds an option to generate the trigger based on a duty
cycle value.
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
