Commit Graph

35 Commits

Author SHA1 Message Date
Yanfeng Liu
a66c7c3ee1 comments/docs: fix typos in comments
This fix some typos in comments.

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
2024-03-06 13:31:50 +08:00
anjiahao
94d449e722 arch:Mark key functions to prohibit instrumentation to prevent recursive calls
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2023-12-11 02:06:51 -08:00
Alexander Merkle
f6695738e1 arch/arm: add ARMv8-r(Cortex-R52) support
Basic work required for uniprocessor CortexR52 (ARMv8R AARCH32) using
GICv3 and CP15 mapped arch timer.

Tested on ARM FVP 11.20.

Port is based on ARMv8R AARCH64 and ARMv7R code. Excuse possible copy-paste leftovers.
2023-06-01 09:51:03 -03:00
Xiang Xiao
3d1ce144df arch: Move up_getsp from arch.h to irq.h
since all other special register operation in irq.h

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-07-01 10:44:55 -03:00
chao.an
3f65b562bb arch: inline up_interrupt_context()
inline the up_interrupt_context() to avoid unnecessary stack pushes

Signed-off-by: chao.an <anchao@xiaomi.com>
2022-05-26 04:36:07 +08:00
Xiang Xiao
7faf72cabc arch/arm: Add ARCH_ARMV6M Kconfig to prepare the support of CortexM0+
also align with the armv7m implementation

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-09-22 23:05:29 +01:00
Gregory Nutt
6766aa0ed5 Mea Culpa. Fix nxstyle problems from PR879
In a fit of confusion, I accidentally committed PR 879 before it passed its nxstyle check (it did pass all of its build tests, but not the style check).  It was really my intention to merge PR878, but I screwed that up and merged 879 instead.

This PR makes amends by passing all of the .c and .h files modified by PR879 through nxstyle and correcting all reported style problems.
2020-04-26 11:56:15 -03:00
qiaowei
2376d8a266 Porting arch/armv8-m support
1. Add dsp extension; float point based on hardware and software.
2. Delete folder "iar"
3. Add tool chain for cortex-M23 and cortex-M35p

Signed-off-by: qiaowei <qiaowei@xiaomi.com>
Change-Id: I5bfc78abb025adb0ad4fae37e2b444915f477fe7
2020-04-26 07:43:37 -06:00
Nathan Hartman
679b4fbee2 arch: Fix included directed -> included directly
This typo had been copied and pasted into numerous irq and syscall
headers.
2020-04-05 22:31:15 +01:00
Xiang Xiao
68951e8d72 Remove exra whitespace from files (#189)
* Remove multiple newlines at the end of files
* Remove the whitespace from the end of lines
2020-01-31 09:24:49 -06:00
zhangyuan7
471a18ee4d arch/arm: Add the initial cortex-a7 archtiecture support 2019-03-19 11:51:29 -06:00
Xiang Xiao
2f208fdde8 arch/Kconfig: Move FPU options to a common place and unify the usage by removing ARCH_CORTEXRxF. 2019-03-19 10:26:15 -06:00
Gregory Nutt
270aa2848a Squashed commit of the following:
BCM2708:  Add enough infrastructrue (more stubs) to get a clean compilation of the Pi Zero configuration (with many undefined things at link time).

    BCM2708:  Add basic interrupt handling logic

    BCM2708: Add interrupt register definitions.

    BCM2708:  Add irq.h header file

    BCM2708/Pi zero:  bcm_boot.c and bcm_memorymap.h now compile.  Added pizero linker script.

    BCM2708/Pi Zero:  Add Make.defs needed to build.

    arch/arm/include/bcm2708, arch/arm/src/bcm2708, configs/pizero:  Add some basic build and configuration logic.

    configs/pizero:  Add some basic structure of the Rasperry Pi Zero port.

    Created directory configs/pizero.  Nothing there now but a README.txt file.

    Add initial boot.c and memorymap.c files
    Author: Alan Carvalho de Assis <acassis@gmail.com>

    Add AUX/UART/SPI registers definition
    Author: Alan Carvalho de Assis <acassis@gmail.com>

    Pizero GPIO registers
    * Initial commit to add GPIO definitions
    * Add remaining GPIO registers definition
    Alan Carvalho de Assis <acassis@gmail.com>

    BCM2708 memory map:  Add VBASE defintions; fix VCSDRAM address per Alan; move all virtual address to the bottom of the file to avoid confusion -- top is all physical address; bottom is all veritural address.

    Add initial memory map to BCM2708/BCM2835
    Alan Carvalho de Assis <acassis@gmail.com>
2017-10-09 13:11:17 -06:00
Gregory Nutt
b466f18daf i.MX6: Some fixes for early compile issues 2016-03-01 14:15:43 -06:00
Gregory Nutt
83bc1c97c3 Rename irqsave() and irqrestore() to up_irq_save() and up_irq_restore() 2016-02-14 16:11:25 -06:00
Gregory Nutt
bacf7cf07e ARMv7-R: fix some issues to get a clean compilation; TMS570: Add enough logic to support a minimum build. Not much there on the initial commit 2015-12-16 09:03:14 -06:00
Gregory Nutt
36726b1bc4 Standardize the width of all comment boxes in header files 2015-10-02 17:42:29 -06:00
Gregory Nutt
29136e51cc Clean up and review of header files for conformance to standards 2015-06-12 19:26:01 -06:00
Gregory Nutt
ae15c6963c Make some file section headers more consistent with standard 2015-04-08 08:04:12 -06:00
Gregory Nutt
fdac423979 Cortex-M7/SAMV71-XULT: Various fixes for building Cortex-M7 with SAMV71. 2015-03-06 10:53:57 -06:00
Gregory Nutt
a55dda98b3 Add hooks to select Cortex-A8 2013-08-27 08:46:37 -06:00
Gregory Nutt
28a90ba46d Some initial frame for Cortex-A5 support. No much yet 2013-07-18 15:20:47 -06:00
patacongo
e6f3604333 LPC1788 PLL configuration from Rommel Marcelo
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5654 42af7a65-404d-4744-a932-0658087f49c3
2013-02-16 12:46:09 +00:00
patacongo
36df84c843 Email address change in nuttx/
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5145 42af7a65-404d-4744-a932-0658087f49c3
2012-09-13 18:32:24 +00:00
patacongo
f93b962f28 Name change: Change Cortex-M3 naming to ARMv7-M naming so support Cortex-M4
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3846 42af7a65-404d-4744-a932-0658087f49c3
2011-08-05 21:57:49 +00:00
patacongo
167040b9e1 First cut at x86 build environment
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3336 42af7a65-404d-4744-a932-0658087f49c3
2011-03-04 22:25:03 +00:00
patacongo
c8095344f4 Move ARM and Cortex header files to separate directories
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1796 42af7a65-404d-4744-a932-0658087f49c3
2009-05-19 17:31:58 +00:00
patacongo
2827157b5f 1st cut at lm3s6918 interrupt handling
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1776 42af7a65-404d-4744-a932-0658087f49c3
2009-05-13 16:19:05 +00:00
patacongo
0df1e24cc9 lm3s6918 update
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1775 42af7a65-404d-4744-a932-0658087f49c3
2009-05-13 14:29:22 +00:00
patacongo
e89052dfab Add irqsave/restore() macros for Cortex-M3
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1758 42af7a65-404d-4744-a932-0658087f49c3
2009-05-07 15:59:13 +00:00
patacongo
ec045239cf Signal save fields should not be available if there are no signals
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1218 42af7a65-404d-4744-a932-0658087f49c3
2008-11-13 14:44:28 +00:00
patacongo
8029ac52a7 cosmetic
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1138 42af7a65-404d-4744-a932-0658087f49c3
2008-11-06 16:21:23 +00:00
patacongo
1223aff22a Changes for SDCC compiler
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@453 42af7a65-404d-4744-a932-0658087f49c3
2007-12-28 01:44:34 +00:00
patacongo
71b386e3fc Changes for clean compile of DM90x0 driver on Neuros OSD
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@365 42af7a65-404d-4744-a932-0658087f49c3
2007-11-02 23:05:53 +00:00
patacongo
770f37aa0d Common ARM support
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@187 42af7a65-404d-4744-a932-0658087f49c3
2007-04-28 19:39:18 +00:00