Ramtin Amin
b568bfa813
Misoc LM3: Add Misoc Ethernet driver. Integrate network support into configs/misoc/hello. Remove configs/misoc/include/generated directory. I suppose the the intent now is that this is a symbolic link? DANGER! This means that you cannot compile this code with first generating these files a providing a symbolic link to this location!
2016-11-28 11:08:29 -06:00
Gregory Nutt
00215fbc98
sched_note: Add spinlock instrumentation; In SMP configurations, select to log only notes from certain CPUs
2016-11-28 10:33:46 -06:00
Gregory Nutt
d65be718c2
sched_note: Extend OS instrumentation to include some SMP events.
2016-11-27 17:14:57 -06:00
Gregory Nutt
cbf98ae0a0
ARMv7 GIC: SGIs are non-maskable but go through the same path as other, maskable interrupts. Added logic to serialize SGI processing when necessary.
2016-11-27 13:18:34 -06:00
Gregory Nutt
21e42d18c1
ARMv7-A/i.MX6 SMP: Move SMP coherernt cache setup to earlier in initialization of CPUn, n>0
2016-11-27 11:28:24 -06:00
Alan Carvalho de Assis
b5bfe8af17
The Smoothie project needs to compile C++ inside config/boardname/src/ to use with High Priority Interruption, then I modified the board configs Makefile to support it, see attached patch.
...
It works fine for the first time compilation, but if we execute:
$ touch config/boardname/src/Pin.cxx
And execute "make" it will not detect that Pin.cxx was modified. I think there is some other place I should modify, but I didn't find it.
2016-11-27 11:19:46 -06:00
Gregory Nutt
cd54c71dc1
ARMv7-A/i.MX6: Modify handling of the SMP cache coherency configuration so that it is identical to the steps from the TRM. Makes no differenct, however.
2016-11-27 10:21:46 -06:00
Gregory Nutt
278d8330d6
arm_scu.c edited online with Bitbucket. Fux some typos.
2016-11-27 02:59:42 +00:00
Gregory Nutt
3f6eadc238
ARMv7-A: Fix some SCU SMP logic
2016-11-26 18:41:48 -06:00
Gregory Nutt
546e352830
i.MX6: Add some controls to enable SMP cache coherency in SMP mode
2016-11-26 17:46:20 -06:00
Gregory Nutt
3353d9280f
i.MX6: Disable non-cached region support. Add SCU register definitions.
2016-11-26 17:03:57 -06:00
Gregory Nutt
8dc79bb7ef
Update comments and README file
2016-11-26 16:02:37 -06:00
Gregory Nutt
ba2436bdb7
Merge branch 'imx6-smp'
...
This adds support for keeping i.MX6 inter-processor communication data in a non-cached address region.
2016-11-26 14:25:46 -06:00
Gregory Nutt
b2ba12e02a
SMP: Basic function
2016-11-26 14:23:23 -06:00
Gregory Nutt
785ed5faf2
SMP: A few more compile/link issues. Still problems.
2016-11-26 13:20:11 -06:00
Gregory Nutt
6ff6da083f
Fix a few compile related issues from the last commit
2016-11-26 12:23:09 -06:00
Gregory Nutt
aae306e942
i.MX6 SMP: Inter-CPU data no saved in a non-cacheable region.
2016-11-26 12:04:02 -06:00
Gregory Nutt
8e50541b10
Update comments
2016-11-26 11:07:11 -06:00
Gregory Nutt
dda0ac8b21
Update comments
2016-11-26 11:06:24 -06:00
Gregory Nutt
9376296e99
Merge remote-tracking branch 'origin/master' into imx6-smp
2016-11-26 11:02:55 -06:00
Gregory Nutt
8bacb1e426
Update comments
2016-11-26 11:02:21 -06:00
Gregory Nutt
5316652301
Merge remote-tracking branch 'origin/master' into imx6-smp
2016-11-26 10:45:04 -06:00
Gregory Nutt
bdf570ea08
Fix typos in comments
2016-11-26 10:42:25 -06:00
Gregory Nutt
2fba04f752
i.MX6 SMP: Beginning of non-cacheable region (incomplete)
2016-11-26 10:37:06 -06:00
Gregory Nutt
61b45a8544
i.MX6: Add some comments
2016-11-26 09:27:29 -06:00
Gregory Nutt
e3fe320e08
SMP: Add support for linking spinlocks into a special, non-cached memory region.
2016-11-26 08:47:03 -06:00
Gregory Nutt
1d06e786e1
SMP: Clean-up and simplication of logic that I implemented late last night.
2016-11-26 07:05:27 -06:00
Gregory Nutt
465e297b5b
Uncomment CONFIG_APPS_DIR in a defconfig file
2016-11-25 23:10:58 -06:00
Gregory Nutt
a62f562207
Merged in w8jcik/nuttx-hymini-rtcback (pull request #175 )
...
Enable CONFIG_RTC in the hymini-stm32v/nsh2 (kitchensink) config
2016-11-26 05:06:29 +00:00
Gregory Nutt
a0e1af2614
SMP: Fix yet another potential deadlock
2016-11-25 23:04:27 -06:00
Maciej Wójcik
91df487622
add rtc back
2016-11-26 01:17:22 +01:00
Maciej Wójcik
c1082b283c
refresh config
2016-11-26 01:15:47 +01:00
Gregory Nutt
d6a3aab0b4
Merge branch 'master' of bitbucket.org:nuttx/nuttx
2016-11-25 10:56:24 -06:00
Gregory Nutt
5aeb4fb844
Update all STM3210E-EVAL configurations
2016-11-25 10:55:48 -06:00
Gregory Nutt
6c4848dcda
Merged in w8jcik/nuttx-f1-rtcounter (pull request #174 )
...
Fix for F1 RTC Clock, tested on F103
2016-11-25 12:38:02 +00:00
Aleksandr Vyhovanec
592890acfc
Merged nuttx/nuttx into master
2016-11-25 10:08:55 +03:00
Maciej Wójcik
0d0b1b64e2
Fix for F1 RTC Clock, tested on F103
2016-11-25 06:17:18 +01:00
Gregory Nutt
b08fb33c28
SMP: Fix typos in some conditional compilation
2016-11-24 17:59:45 -06:00
Gregory Nutt
7f636f2280
SMP: Add spin_trylock(). Use this in conditions where other CPUs need to stopped but we cannot call enter_critical_section.
2016-11-24 13:33:43 -06:00
Ramtin Amin
7568aaf213
Misoc LM32: Add signal handling logic
2016-11-24 12:58:23 -06:00
Gregory Nutt
f77dcdf323
ARMv7-A SMP: Add a little logic to signal handling.
2016-11-24 11:45:05 -06:00
Gregory Nutt
eb9f8074c0
Update comments
2016-11-24 09:56:43 -06:00
Gregory Nutt
c03d126da6
arm_cpupause.c edited online with Bitbucke. What was I thinking... Back out previous change.
2016-11-24 04:45:07 +00:00
Gregory Nutt
19e7f2210e
arm_cpupause.c edited online with Bitbucket. Fix a typo in a comment.
2016-11-24 04:24:40 +00:00
Gregory Nutt
4b0bbf41ca
SMP: Fix backward condition in test.
2016-11-23 22:24:14 -06:00
Gregory Nutt
7bec4ffeec
Update some comments
2016-11-23 17:40:01 -06:00
Alan Carvalho de Assis
7dbc25b02b
LPC43xx: Add timer driver; configs/bambino-200e: Add support for timer driver
2016-11-23 13:33:51 -06:00
Gregory Nutt
bbc17abf68
Update some comments
2016-11-23 13:30:51 -06:00
Gregory Nutt
d4037a30aa
Update some comments
2016-11-23 13:20:18 -06:00
Ramtin Amin
b8754afb14
Misoc LM32: Make system timer configurable via CONFIG_USEC_PER_TICK.
2016-11-23 07:00:57 -06:00
