Commit Graph

20651 Commits

Author SHA1 Message Date
Petro Karashchenko
e85afaf6cf arch/arm/src/cxd56xx: fix style issues
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2023-05-19 02:40:38 +08:00
zhangyuan21
4466c3d6e9 arm64/cache: Support unalign cache clean.
Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2023-05-18 15:45:42 +03:00
simbit18
c2779e5171 arch\arm\src\lpc54xx\Kconfig: Fix indentation
Remove TABs
2023-05-18 15:43:22 +03:00
simbit18
0b97979378 arch/arm/src/stm32h7/stm32_usbhost.c: Fix nxstyle errors
error: Long line found
2023-05-18 20:14:45 +08:00
zhangyuan21
077c16fc71 arch/xtensa: only cmp fpu coprocessor for fpu test
Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2023-05-18 17:30:38 +08:00
zhangyuan21
3d47505ec7 arch/arm: Add a "cc" flag to instructions that may modify condition flag.
Notify the compiler that the condition flag has changed to prevent the
compiler from optimizing and reordering instructions, which may cause exceptions.

Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2023-05-18 17:23:16 +08:00
qiaohaijiao1
f67e50e920 sim/sim_alsa: modify buffer_size in GET_BUFFERINFO when offload capture.
1. when offload capture, apb buffer must big enough to fill
samples of encoder.
2. pass samplerate, channels to encoder.
2023-05-18 17:22:46 +08:00
zhangyuan21
150680d677 arch/arm: set arm_testset to weak function
Some chips require the implementation of
their own unique test set function.

Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2023-05-18 13:46:27 +08:00
Xiang Xiao
7dc0d70092 arch: Save sigdeliver into xcp in the case of signal self delevery
to avoid the infinite recusive dispatch:
*0  myhandler (signo=27, info=0xf3e38b9c, context=0x0) at ltp/testcases/open_posix_testsuite/conformance/interfaces/sigqueue/7-1.c:39
*1  0x58f1c39e in nxsig_deliver (stcb=0xf4e20f40) at signal/sig_deliver.c:167
*2  0x58fa0664 in up_schedule_sigaction (tcb=0xf4e20f40, sigdeliver=0x58f1bab5 <nxsig_deliver>) at sim/sim_schedulesigaction.c:88
*3  0x58f19907 in nxsig_queue_action (stcb=0xf4e20f40, info=0xf4049334) at signal/sig_dispatch.c:115
*4  0x58f1b089 in nxsig_tcbdispatch (stcb=0xf4e20f40, info=0xf4049334) at signal/sig_dispatch.c:435
*5  0x58f31853 in nxsig_unmask_pendingsignal () at signal/sig_unmaskpendingsignal.c:104
*6  0x58f1ca09 in nxsig_deliver (stcb=0xf4e20f40) at signal/sig_deliver.c:199
*7  0x58fa0664 in up_schedule_sigaction (tcb=0xf4e20f40, sigdeliver=0x58f1bab5 <nxsig_deliver>) at sim/sim_schedulesigaction.c:88
*8  0x58f19907 in nxsig_queue_action (stcb=0xf4e20f40, info=0xf4049304) at signal/sig_dispatch.c:115
*9  0x58f1b089 in nxsig_tcbdispatch (stcb=0xf4e20f40, info=0xf4049304) at signal/sig_dispatch.c:435
*10 0x58f31853 in nxsig_unmask_pendingsignal () at signal/sig_unmaskpendingsignal.c:104
*11 0x58f1ca09 in nxsig_deliver (stcb=0xf4e20f40) at signal/sig_deliver.c:199
*12 0x58fa0664 in up_schedule_sigaction (tcb=0xf4e20f40, sigdeliver=0x58f1bab5 <nxsig_deliver>) at sim/sim_schedulesigaction.c:88
*13 0x58f19907 in nxsig_queue_action (stcb=0xf4e20f40, info=0xf40492d4) at signal/sig_dispatch.c:115
*14 0x58f1b089 in nxsig_tcbdispatch (stcb=0xf4e20f40, info=0xf40492d4) at signal/sig_dispatch.c:435
*15 0x58f31853 in nxsig_unmask_pendingsignal () at signal/sig_unmaskpendingsignal.c:104
*16 0x58f1ca09 in nxsig_deliver (stcb=0xf4e20f40) at signal/sig_deliver.c:199
*17 0x58fa0664 in up_schedule_sigaction (tcb=0xf4e20f40, sigdeliver=0x58f1bab5 <nxsig_deliver>) at sim/sim_schedulesigaction.c:88
*18 0x58f19907 in nxsig_queue_action (stcb=0xf4e20f40, info=0xf40492a4) at signal/sig_dispatch.c:115
*19 0x58f1b089 in nxsig_tcbdispatch (stcb=0xf4e20f40, info=0xf40492a4) at signal/sig_dispatch.c:435
*20 0x58f31853 in nxsig_unmask_pendingsignal () at signal/sig_unmaskpendingsignal.c:104
*21 0x58f1ca09 in nxsig_deliver (stcb=0xf4e20f40) at signal/sig_deliver.c:199
*22 0x58fa0664 in up_schedule_sigaction (tcb=0xf4e20f40, sigdeliver=0x58f1bab5 <nxsig_deliver>) at sim/sim_schedulesigaction.c:88
*23 0x58f19907 in nxsig_queue_action (stcb=0xf4e20f40, info=0xf4049274) at signal/sig_dispatch.c:115
*24 0x58f1b089 in nxsig_tcbdispatch (stcb=0xf4e20f40, info=0xf4049274) at signal/sig_dispatch.c:435
*25 0x58f31853 in nxsig_unmask_pendingsignal () at signal/sig_unmaskpendingsignal.c:104
*26 0x58f1ca09 in nxsig_deliver (stcb=0xf4e20f40) at signal/sig_deliver.c:199
*27 0x58fa0664 in up_schedule_sigaction (tcb=0xf4e20f40, sigdeliver=0x58f1bab5 <nxsig_deliver>) at sim/sim_schedulesigaction.c:88
*28 0x58f19907 in nxsig_queue_action (stcb=0xf4e20f40, info=0xf4049244) at signal/sig_dispatch.c:115
*29 0x58f1b089 in nxsig_tcbdispatch (stcb=0xf4e20f40, info=0xf4049244) at signal/sig_dispatch.c:435
*30 0x58f31853 in nxsig_unmask_pendingsignal () at signal/sig_unmaskpendingsignal.c:104
*31 0x58f1ca09 in nxsig_deliver (stcb=0xf4e20f40) at signal/sig_deliver.c:199

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-05-17 11:53:18 -06:00
Tiago Medicci Serrano
496a77653a arch/xtensa/esp32_esp32s3: prevent arch's libc in the userspace
ESP32 and ESP32-S3 should use the ROM-defined versions of the libc
in flat build and, when building the protected mode, in the kernel.

The ROM-defined version of the libc functions can't be used in the
userspace, however, because it isn't allowed to access the memory
region in flash directly from the userspace. That being said,
`LIBC_PREVENT_STRING_KERNEL` should be selected to avoid building
any implementation of the libc, being the ROM-defined versions
linked instead.

NuttX's software implemented version of the libc will be built in
the userspace. Also, the assembly-defined version of some of the
libc functions (`XTENSA_xxx`) may also be selected to be used in
the userspace.
2023-05-17 13:58:48 +08:00
chao an
6be363ff35 drivers/serial: fix race condition in multi-thread write
if multiple threads are doing serial read/write at the same time,
the driver will only wake up one of the thread, which will cause
other threads fail to be woken up in time and cause blocking

Signed-off-by: chao an <anchao@xiaomi.com>
2023-05-17 07:56:08 +02:00
Xiang Xiao
7a8cf7ff70 Indent the include statement by two spaces
follow the coding style

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-05-16 12:34:32 -03:00
chao an
150e5a1a0f sim/posix/backtrace: process host backtrace with critical section
backtrace() is not a signal safe

Signed-off-by: chao an <anchao@xiaomi.com>
2023-05-16 17:05:42 +08:00
Lwazi Dube
555506a584 arch/arm/sama5: Make EHCI work with slow devices.
Make low/full speed devices work with EHCI while OHCI is disabled. A
high speed USB hub has to be plugged into the root hub. This change
will also allow the optional use of a full speed hub between the
high speed hub and the low/full speed device. A recursive mutex is
used to avoid deadlocks.
2023-05-16 08:14:54 +02:00
raiden00pl
507aa430c9 stm32h7/Kconfig: fix CI 2023-05-16 03:11:29 +08:00
Ville Juven
a940ea0134 riscv/riscv_copystate.c: Remove riscv_copystate.c as it is not used anymore
I keep getting confused by this function until I remember again that it is
not used any more. Let's just get rid of it.
2023-05-15 19:35:18 +08:00
Sebastien Lorquet
567a3ca37c Fix some warnings in STM32H7 IWDG 2023-05-15 19:34:17 +08:00
raiden00pl
5c3fa2d788 stm32h7/otg: allow USBDEV and USBHOST to work simultaneously 2023-05-15 17:32:32 +08:00
raiden00pl
eee25ea1eb stm32h7/otg: move sanity checks to common header file for use USBDEV and USBHOST 2023-05-15 17:32:32 +08:00
simbit18
ac392b5306 arch/arm/src/stm32f7/stm32_usbhost.c: Fix nxstyle errors
error: Long line found
2023-05-15 10:44:17 +08:00
TimJTi
b4b9a180c0 Add ATSAMA5D2/D4 Secure Fuse Controller (SFC) driver 2023-05-12 16:29:48 -03:00
simbit18
aa0cb3f76f Fix typos (s/FRQUENCY/FREQUENCY/)
Fix various typos FRQUENCY -> FREQUENCY
2023-05-13 00:31:26 +08:00
Ville Juven
aee45c9c43 riscv/addrenv: Create utility function for dynamic mappings
Move the mapping functionality from up_shmat/shmdt into two generic
mapping functions. This makes it possible to do other mappings besides
user shared memory area mappings.
2023-05-12 22:32:31 +08:00
raiden00pl
d205c8c0e0 arch/stm32f7: fixes for pinmap 2023-05-12 11:43:08 +08:00
Alan Carvalho de Assis
694e6f550b esp32xx: Workaround to avoid printing serial trash character
During the serial reconfiguration from bootloader to the
NuttX a trash character "?" (Unicode replacement U+FFFD)
was printed in the screen.

This fix was discovered by Sylvio Alves from Espressif!
2023-05-12 06:30:35 +03:00
Alan Carvalho de Assis
54d92d1a0f Fix typo -EACESS -> -EACCES 2023-05-12 06:29:35 +03:00
Tiago Medicci Serrano
e8e50900d0 esp32c3/wifi: use wapis init config to save Wi-Fi data
Instead of using Espressif's emulated NVS to save Wi-Fi data, use
`wapi`s wireless configure initialization mechanism for saving
Wi-Fi data. It 1) avoids creating a specific storage partition
just to save Wi-Fi data (ESP32-C3's storage partition is used
instead); 2) avoids initialization problems of the emulated NVS
when SMP is enabled (the Wi-Fi driver tries to initialize it before
the actual partition is initialized); and 3) enables reconnecting
using `wapi reconnect` command and connect the device automatically
on bringup if `CONFIG_NETUTILS_NETINIT` is selected.
2023-05-12 01:09:09 +08:00
Tiago Medicci Serrano
3e07477c85 esp32/wifi: use wapis init config to save Wi-Fi data
Instead of using Espressif's emulated NVS to save Wi-Fi data, use
`wapi`s wireless configure initialization mechanism for saving
Wi-Fi data. It 1) avoids creating a specific storage partition
just to save Wi-Fi data (ESP32's storage partition is used
instead); 2) avoids initialization problems of the emulated NVS
when SMP is enabled (the Wi-Fi driver tries to initialize it before
the actual partition is initialized); and 3) enables reconnecting
using `wapi reconnect` command and connect the device automatically
on bringup if `CONFIG_NETUTILS_NETINIT` is selected.
2023-05-12 01:09:09 +08:00
Tiago Medicci Serrano
b680abd04b esp32s3/wifi: use wapis init config to save Wi-Fi data
Instead of using Espressif's emulated NVS to save Wi-Fi data, use
`wapi`s wireless configure initialization mechanism for saving
Wi-Fi data. It 1) avoids creating a specific storage partition
just to save Wi-Fi data (ESP32-S3's storage partition is used
instead); 2) avoids initialization problems of the emulated NVS
when SMP is enabled (the Wi-Fi driver tries to initialize it before
the actual partition is initialized); and 3) enables reconnecting
using `wapi reconnect` command and connect the device automatically
on bringup if `CONFIG_NETUTILS_NETINIT` is selected.
2023-05-12 01:09:09 +08:00
Lwazi Dube
d66282a893 usbhost: Fix function address generation for multi-port root hubs.
Devices connected to the same USB bus should have unique function addresses.
This was not true for root hubs with multiple ports. After this change,
enumeration is more reliable on the sama5d3-xplained board when both root hub
ports are used.

This change amounts to using one usbhost_devaddr_s object per root hub
instead of one per root hub port. For the majority of boards only one
root hub port is available so no change in behavior should be expected.
2023-05-11 09:44:18 +02:00
Lee Lup Yuen
4ed48c33e9 arm64/a64: Add support for Multiple UART Ports
Currently only Port UART0 is supported for Allwinner A64. This PR adds support for all UART Ports: UART1 to UART4. (Except R-UART, which is a special low-power UART)

This is required for the upcoming LTE Modem Driver (Quectel EG25-G) for PINE64 PinePhone, which uses UART3. [(Details here)](https://lupyuen.github.io/articles/lte2)

The code was adapted from the NuttX UART Driver for Allwinner A1X: [`a1x_serial.c`](https://github.com/apache/nuttx/blob/master/arch/arm/src/a1x/a1x_serial.c)

`arch/arm64/src/a64/a64_serial.c`: Added ports UART1 to UART4, based on [`a1x_serial.c`](https://github.com/apache/nuttx/blob/master/arch/arm/src/a1x/a1x_serial.c)

`arch/arm64/src/a64/a64_serial.h`: Added IRQs for UART1 to UART4. Moved UART Base Addresses to `a64_memorymap.h`

`arch/arm64/src/a64/hardware/a64_memorymap.h`: Added UART Base Addresses for UART0 to UART4

`arch/arm64/src/a64/Kconfig`: Added UART1 to UART4 to Allwinner A64 Peripheral Selection menu

`boards/arm64/a64/pinephone/configs/lcd/defconfig`, `lvgl/defconfig`, `nsh/defconfig`, `sensor/defconfig`: Fixed `UART1_SERIAL_CONSOLE` to `UART0_SERIAL_CONSOLE`
2023-05-11 09:41:18 +02:00
Lucas Saavedra Vaz
a895cd4854 arch/xtensa/esp32s2: Define syscall table to enable using ROM functions
This commit aims to enable the use of ROM functions on ESP32-S2.
This is done by creating the required syscall stubs table and adding the missing symbols to the linker script.
2023-05-10 15:39:44 -03:00
Lucas Saavedra Vaz
274a79fd34 arch/xtensa/esp32: Define syscall table to enable using ROM functions
This commit aims to enable the use of ROM functions on ESP32.
This is done by creating the required syscall stubs table and adding the missing symbols to the linker script.
2023-05-10 15:39:44 -03:00
simbit18
53d0d04e8e arch/risc-v/src/esp32c6/Kconfig: Fix help attribute
Replace help => ---help---
2023-05-10 22:51:11 +08:00
simbit18
2909260f91 arch/arm64/Kconfig: Fix help attribute
Replace help => ---help---
2023-05-10 22:51:11 +08:00
simbit18
f5514a1113 arch/xtensa/src/esp32/Kconfig: Fix Kconfig style
Remove spaces from Kconfig files
Add TABs
2023-05-10 22:51:11 +08:00
Dong Heng
9ae2fa2b54 xtensa/esp32s3: Fix code style of esp32s3_psram_octal.c 2023-05-10 10:55:20 -03:00
Takumi Ando
08eef2a700 stm32f0l0g0: Fix GPIO port definitions
These series have the following GPIO ports:
- STM32F03X: A to D, and F
- STM32F05/07/09X: A to F
- STM32G0X: A to F
- STM32L0X: A to E, and H

Signed-off-by: Takumi Ando <t-ando@advaly.co.jp>
2023-05-10 18:01:07 +08:00
Takumi Ando
94eb8a0ee0 stm32f0l0g0: Add GPIOE to STM32G0x
All STM32G0x series have 6 GPIO ports A to F.

Refered: RM0444, RM0454

Signed-off-by: Takumi Ando <t-ando@advaly.co.jp>
2023-05-10 18:01:07 +08:00
Dong Heng
3161005c40 xtensa/esp32: Fix himem driver crash in SMP mode 2023-05-10 17:56:38 +08:00
hujun5
6e71527af2 arch/arm64: 64 bit platform compile error reported
compile error log:
common/arm64_arch_timer.c: In function 'arm64_tick_max_delay':
common/arm64_arch_timer.c:178:12: error: conversion from 'long unsigned int' to 'clock_t' {aka 'unsigned int'} changes value from '18446744073709551615' to '4294967295' [-Werror=overflow]
  178 |   *ticks = UINT64_MAX;
      |            ^~~~~~~~~~

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2023-05-10 09:06:59 +02:00
hujun5
7f4cb3057a arch/arm64: merge serial_pl011.c and qemu_serial.c
At present, the serial drivers qemu_serial.c and serial_pl011.c on the fvp-v8r and qemu platforms in arm64 are duplicated
and need to be merged. The plan is to place them under the drivers\serial directory to create a common code module,
so that both fvp-v8r and qemu can use the same code.
In the future, if new platforms use pl011 serial ports, they can also be directly reused

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2023-05-10 09:06:59 +02:00
simbit18
4720162a97 arch/z80/src: Fix nxstyle errors
error: Long line found
2023-05-10 00:47:41 +08:00
David Sidrane
8068dc0238 stm32h7:sdmmc It is not an error if no wait was needed
If the CONFIG_MMCSD_SDIOWAIT_WRCOMPLETE is enabled and the
   card is found to be ready in the waitenable call. Then
   we do not need a Watchdog nor to configure the pin for
   IRQ to detect ready.

   This was reported as an error, and it is not, it simply means
   we do not have to wait.
2023-05-10 00:46:44 +08:00
simbit18
e01a46c8c3 arch/risc-v/src/qemu-rv/Kconfig: Fix indentation
Remove spaces from Kconfig
Add TABs
2023-05-10 00:45:29 +08:00
simbit18
4452ee0743 arch/risc-v/src/mpfs/Kconfig: Fix indentation
Remove spaces from Kconfig
Add TABs
2023-05-10 00:45:29 +08:00
simbit18
2a56bbdb00 arch/ceva/src/xc5/Kconfig: Fix indentation
Remove spaces from Kconfig
Add TABs
2023-05-10 00:45:29 +08:00
simbit18
58ebf26b98 arch/arm/src/tlsr82/Kconfig: Fix indentation
Remove spaces from Kconfig
Add TABs
2023-05-10 00:45:29 +08:00
simbit18
79d6d56532 arch/arm/src/sama5/Kconfig: Fix indentation
Remove spaces from Kconfig
Add TABs
2023-05-10 00:45:29 +08:00
simbit18
64c4fb0a53 arch/arm/src/s32k3xx/Kconfig: Fix indentation
Remove spaces from Kconfig
Add TABs
2023-05-10 00:45:29 +08:00