Commit Graph

53121 Commits

Author SHA1 Message Date
Petro Karashchenko
357f8093ac arch/arm/samv7: fix U(S)ART clock enable for 1-wire
By default U(S)ART clocks are enabled in sam_lowput.c but
configuration check from sam_config.h may override USART configuration
and prevent clocks from been enabled.

This commit fix inconsistency in U(S)ART pinmux and clock configuration

Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2024-05-23 15:15:46 +08:00
Petro Karashchenko
59a23768c5 arch/arm/samv7: remove duplicated prototypes
sam_lowputc.h is almost identical to sam_start.h so remove
one of the headers

Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2024-05-23 15:15:21 +08:00
meijian
0bad215cf8 net/tcp: fix tcp will not close when tcp retransmission reaches TCP_MAXRTX
In "psock_send_eventhandler",when retransmit count bigger TCP_MAXRTX nuttx will set release wrb. But before this it will also set "conn->tx_unacked = 0" if we only retransmit one packet(conn->tx_unacked == sent),and In func "tcp_timer" only "conn->tx_unacked > 0" will close the tcp conn. So app will never close if nuttx retransmit over max timers.

Signed-off-by: meijian <meijian@xiaomi.com>
2024-05-22 17:46:04 -03:00
hujun5
61caf7cce9 types: on some arch, execution speed can be accelerated
in arm64 Let's see how the following code looks like in assembly

volatile cpu_set_t g_cpu_set;
cpu_set_t set_cpu_set_t_set(int cpu) {
  g_cpu_set &= ~(1 << cpu);
  return g_cpu_set;
}

when
typedef volatile uint32_t cpu_set_t;
Dump of assembler code for function set_cpu_set_t_set:
   0x0000000040288570 <+0>:	adrp	x2, 0x403ce000 <g_irqvector+1160>
   0x0000000040288574 <+4>:	ldr	w3, [x2, #2368]
   0x0000000040288578 <+8>:	mov	w1, #0x1
   0x000000004028857c <+12>:	lsl	w1, w1, w0
   0x0000000040288580 <+16>:	bic	w1, w3, w1
   0x0000000040288584 <+20>:	str	w1, [x2, #2368]
   0x0000000040288588 <+24>:	ldr	w0, [x2, #2368]
   0x000000004028858c <+28>:	ret

when
typedef volatile uint8_t cpu_set_t;
Dump of assembler code for function set_cpu_set_t_set:
   0x000000004028856c <+0>:	adrp	x2, 0x403ce000 <g_irqvector+1192>
   0x0000000040288570 <+4>:	ldrb	w3, [x2, #2336]
   0x0000000040288574 <+8>:	mov	w1, #0x1
   0x0000000040288578 <+12>:	and	w3, w3, #0xff           // At this time, there will be one more instruction
   0x000000004028857c <+16>:	lsl	w1, w1, w0
   0x0000000040288580 <+20>:	bic	w1, w3, w1
   0x0000000040288584 <+24>:	strb	w1, [x2, #2336]
   0x0000000040288588 <+28>:	ldrb	w0, [x2, #2336]
   0x000000004028858c <+32>:	ret

test:
We can use qemu for testing.

compiling
make distclean -j20; ./tools/configure.sh -l qemu-armv8a:nsh_smp ;make -j20
running
qemu-system-aarch64 -cpu cortex-a53 -smp 4 -nographic -machine virt,virtualization=on,gic-version=3 -net none -chardev stdio,id=con,mux=on -serial chardev:con -mon chardev=con,mode=readline -kernel ./nuttx
Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-05-22 19:10:03 +08:00
Yanfeng Liu
d019828d3c sched/pthread: rename pthread_initialize.c as pthread_sem.c
This is to better match the contents of the source file.

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
2024-05-22 19:06:38 +08:00
Yanfeng Liu
f8749ef0e0 arch/risc-v: guard tcb->name usage
Add guard for tcb->name field usage as it is not always available.

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
2024-05-22 19:06:07 +08:00
Yanfeng Liu
4b2b26c0b0 ci/ltp: enlarge timeout for LTP test
This increases timeout value for `ltp_interfaces_pthread_once_2_1`.

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
2024-05-22 16:40:13 +08:00
Yanfeng Liu
7db71c8ee4 ci/riscv: fix unused var in esp_twai.c
This is to fix issue in [this log](https://github.com/apache/nuttx/actions/runs/9173629303/job/25222879619):

```
Configuration/Tool: esp32c3-generic/twai esp32c6-devkitm/twai esp32c6-devkitc/twai  esp32h2-devkit/twai
Error: common/espressif/esp_twai.c:242:7: error: variable 'ret' set but not used [-Werror=unused-but-set-variable]
```

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
2024-05-22 16:40:13 +08:00
Yanfeng Liu
3bfdb14f4d ci/riscv: fix rv-virt/kfb64 CI issue
This fixes `Linux(risc-v)` CI issue
`section .data LMA [0000000080200000,000000008020046f] overlaps
 section .text LMA [0000000080200000,000000008021b2f3]`

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
2024-05-22 16:40:13 +08:00
Rdk-T
8b9568ec13 Fix ECAT_P1_LED_LINK_ACT in xmc4800 board. 2024-05-22 00:53:24 +08:00
simbit18
c6475935ea doc: corrected board names
ST Nucleo F401RE -> ST Nucleo F411RE
ST Nucleo F410RB -> ST Nucleo F412ZG
2024-05-21 12:46:06 -03:00
dependabot[bot]
29ace4e971 ---
updated-dependencies:
- dependency-name: requests
  dependency-type: indirect
...

Signed-off-by: dependabot[bot] <support@github.com>
2024-05-21 19:39:07 +08:00
Eero Nurkkala
2f753a48c7 arm64: s/ARCH_BOOT_EL3/ARCH_ARM64_EXCEPTION_LEVEL/g
Search and replace ARCH_BOOT_EL3 with more generic
ARCH_ARM64_EXCEPTION_LEVEL that holds the EL level
in an integer variable.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2024-05-21 09:02:35 +08:00
Eero Nurkkala
1d3ce6b527 arm64/imx9: provide EL3 bootloader support for iMX9
This provides a capable bootloader that may be run from OCRAM.
The OCRAM contains regions that are always zero, so the linker
file avoids those with best effort.

iMX9 infrastructure expects:
  - 0x20480000 (Start of OCRAM, AHAB)
  - 0x2049a000 (NuttX or SPL)
  - 0x204e0000 (ARM Trustzone, not used)

When started from SD-card, the offsets are:
  - 0x1f000 with AHAB
  - 0xa000  without AHAB

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2024-05-21 09:02:35 +08:00
Eero Nurkkala
1c308296a1 arm64: provide EL3 interrupt support via FIQs
Value 1021, when read from ICC_IAR0_EL1 means:

"The GIC returns this value in response to a read of ICC_IAR0_EL1 or ICC_HPPIR0_EL1 at EL3,
to indicate that the interrupt being acknowledged is one which is expected to be handled at
Non-secure EL1 or EL2. This INTID is only returned when the PE is executing at EL3 using
AArch64 state, or when the PE is executing in AArch32 state in Monitor mode."

When this happens:
  - FIQ is fired on group0
  - IRQ is pending at group1

So simply check and handle the interrupt. In short, this provides interrupt support for
EL3.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2024-05-21 09:02:35 +08:00
Eero Nurkkala
505f57dd00 arm64: introduce MMU support for EL3
Currently MMU supports only EL1.  Introduce EL3 support as well.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2024-05-21 09:02:35 +08:00
Eero Nurkkala
0f9a262311 arm64: provide EL3 support
This provides means to run NuttX completely in EL3.  This may
be useful with NuttX based bootloaders that are executed from
OCRAM.  Instead of SPL/U-boot combo, NuttX may replace SPL
completely.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2024-05-21 09:02:35 +08:00
Eero Nurkkala
ae00569ef9 imx9_clockconfig: fix a thinko
putreg32() arguments were swapped.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2024-05-21 09:02:35 +08:00
hujun5
e067f897c0 sched: remove redundant variables "switched"
test:
We can use qemu for testing.

compiling
make distclean -j20; ./tools/configure.sh -l qemu-armv8a:nsh_smp ;make -j20
running
qemu-system-aarch64 -cpu cortex-a53 -smp 4 -nographic -machine virt,virtualization=on,gic-version=3 -net none -chardev stdio,id=con,mux=on -serial chardev:con -mon chardev=con,mode=readline -kernel ./nuttx

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-05-21 09:00:29 +08:00
YAMAMOTO Takashi
1ee279c292 nuttx kconfig: rename a few recently-added options
from:
ARCH_TEXT_HEAP_SEPARATE_DATA_ADDRESS
ARCH_TEXT_HEAP_WORD_ALIGNED_READ

to:
ARCH_HAVE_TEXT_HEAP_SEPARATE_DATA_ADDRESS
ARCH_HAVE_TEXT_HEAP_WORD_ALIGNED_READ
2024-05-21 01:11:44 +08:00
YAMAMOTO Takashi
d196f800b0 Add a few optional text heap APIs to support esp32s3
esp32s3's Internal SRAM 1 and External Memory have two separate mappings
for instructions and data.
2024-05-21 01:11:44 +08:00
dongjiuzhu1
8e9f24e02e arch/sim: temporary remove vfork test to fix cibreak on arch sim
Signed-off-by: dongjiuzhu1 <dongjiuzhu1@xiaomi.com>
2024-05-20 12:00:39 +08:00
buxiasen
d3d52ee5e2 pm_procfs: update state up to now when pm procfs read
Signed-off-by: buxiasen <buxiasen@xiaomi.com>
2024-05-20 10:29:49 +08:00
Ivan Palijan
87d038c583 Fixed collision between CAN1 and I2C1. Board nucleo-l476rg.
CAN1 moved to PA11 and PA12.
2024-05-20 10:14:42 +08:00
Inochi Amaoto
44bed119f0 boards: rv-virt: Use config to compute memory layout for kernel build
rv-virt support different size of ksram and pgmem region, but the
fixed value in the link script limits this function. As nuttx supports
preprocessing the link script. It is better to use the config value
to compute the memory layout. This also make all kernel build use the
same script.

Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
2024-05-20 10:14:14 +08:00
raiden00pl
697e30e615 sensors/bmm150: configure I2C frequency 2024-05-20 10:13:42 +08:00
raiden00pl
c9bf7a841e sensors/bh1749nuc: configure I2C frequency 2024-05-20 10:13:42 +08:00
raiden00pl
147b5762f0 sensors/bh1749nuc_uorb.c: don't wait for VALID flag in fetch interface
otherwise the sensor freezes when we read RBG and IR data one after another
2024-05-20 10:13:42 +08:00
raiden00pl
9d768498ce sensors/bh1749nuc_uorb.c: add sensor reset 2024-05-20 10:13:42 +08:00
yinshengkai
a517f12f3d tools/docker: install file/tclsh tools
fix CI compilation errors:
github/workspace/sources/apps/database/sqlite/sqlite/configure: line 5204: /usr/bin/file: No such file or directory
/github/workspace/sources/apps/database/sqlite/sqlite/configure: line 10376: tclsh: command not found
/github/workspace/sources/apps/database/sqlite/sqlite/configure: line 10812: tclsh: command not found
/github/workspace/sources/apps/database/sqlite/sqlite/configure: line 10826: tclsh: command not found
configure: WARNING: Can't find Tcl configuration definitions
configure: WARNING: *** Without Tcl the regression tests cannot be executed ***
configure: WARNING: *** Consider using --with-tcl=... to define location of Tcl ***
make[4]: warning: -j0 forced in submake: resetting jobserver mode.
/github/workspace/sources/apps/database/sqlite/sqlite/tool/cktclsh.sh: 5: tclsh: not found
make[4]: *** [Makefile:793: has_tclsh84] Error 1
make[4]: Target 'sqlite3.c' not remade because of errors.
make[3]: *** [Makefile:52: context] Error 2
make[2]: *** [Makefile:53: /github/workspace/sources/apps/database/sqlite_context] Error 2
make[2]: Target 'context_all' not remade because of errors.
make[1]: *** [Makefile:175: context] Error 2
make: *** [tools/Unix.mk:452: /github/workspace/sources/apps/.context] Error 2

Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
2024-05-20 10:12:04 +08:00
Jorge Guzman
7044e38cc7 stm32h7/linum-stm32h753bi: add support to ethernet connection
Signed-off-by: Jorge Guzman  <jorge.gzm@gmail.com>
2024-05-19 10:25:50 -03:00
Rodrigo Sim
29775f824b drivers/sensors/Kconfig: Fix HC-SR04 configuration
Signed-off-by: Rodrigo Sim rcsim10@gmail.com
2024-05-19 10:21:23 -03:00
Rodrigo Sim
8fb458b7fe board/stm32f401rc-rs485: Add support to ultrasonic sensor HC-SR04
Signed-off-by: Rodrigo Sim rcsim10@gmail.com
2024-05-19 10:21:23 -03:00
yinshengkai
e6ed8c6782 sim: add sqlite config
Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
2024-05-17 10:19:31 -03:00
yinshengkai
20ebe0e64c Replace all asserts in kernel code with ASSERT
Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
2024-05-17 10:18:16 -03:00
yinshengkai
f25a506f91 include: When defining NDEBUG, assert will implement alignment standards
As defined by the C standard, if NDEBUG is defined, assert should do nothing but be simply defined as:

  #define assert(ignore) ((void)0)

Reference link:
https://pubs.opengroup.org/onlinepubs/009695399/basedefs/assert.h.html

Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
2024-05-17 10:18:16 -03:00
jfbblue0922
72c1f779d1 add stm32h755II chip 2024-05-17 10:16:39 -03:00
ChenChuang
1d19c6abe3 fix: call rwb->rhreload() when nblocks > 0
There is no need to call rwb->rhreloade() when nblocks is 0,
and some platform(eg: BES) has the limit that the parameter
of len in pltatform flash read function cant't be 0.
2024-05-17 19:15:49 +08:00
Jukka Laitinen
8b1a388d93 boards/risc-v/mpfs/common/src: Update mpfs_emmcsd.c and mpfs_composite.c
Add partition parsing logic to emmcsd and support for configuring either CDCACM alone or
both CDCACM and USBMCS for composite mode.

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2024-05-17 19:14:06 +08:00
Tiago Medicci Serrano
a00fbbeb9f espressif: Add option to disable the GIT_DEPTH to pull submodules
By default, submodules are cloned with `--depth=1`. This continues
to be true if `DISABLE_GIT_DEPTH` environment variable is not
defined (and it is not defined by default). But, if defined the
submodules will be fully cloned (without the `--depth` parameter).
2024-05-17 19:10:46 +08:00
Peter van der Perk
015e7cd607 imxrt: 1170 MPU config ensure no lockups can occur 2024-05-17 19:09:09 +08:00
dulibo1
3762bda5e2 pm: procfs add pm prepare fail stats
Signed-off-by: dulibo1 <dulibo1@xiaomi.com>
Signed-off-by: buxiasen <buxiasen@xiaomi.com>
2024-05-17 19:07:44 +08:00
simbit18
fb31f06a2f Fix Kconfig style
Remove spaces from Kconfig files
Add TABs
Replace help => ---help---
Add comments
2024-05-17 19:06:11 +08:00
Yanfeng Liu
77f3225140 tools/minidump: support 64-bit stack dump
This is to follow up commit 1890b58e67 in patch #12316.

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
2024-05-17 19:05:19 +08:00
Jukka Laitinen
9257af55f1 risc-v/mpfs: Change linker symbols _ssbi_ddr and _esbi_ddr into _ssbi_ram and _esbi_ram
The original names are confusing; the symbols' addresses point to the start and end of the
sbi executable ram area. This may also reside in l2lim and not in ddr, depending on the
configuration, and this is defined in the linker script.

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2024-05-16 17:14:43 -03:00
Ville Juven
35ee532cb4 boards/imx93-evk: Fix potential warning about unused variable
"ret" might be unused, which causes an error due to -Werror
2024-05-16 17:14:25 -03:00
Nicolas Lemblé
03dbb82db9 Add c symbols to std 2024-05-16 10:25:01 -03:00
buxiasen
c9170c3b0a pm: fix when RTC_HIRES enabled pm procfs err
Signed-off-by: buxiasen <buxiasen@xiaomi.com>
2024-05-16 16:23:18 +08:00
buxiasen
6ef6d75840 PM: change domain field state after callback done
Swap the sequence of domain state update and statechanged callback,
Make sure inside statechanged callback can get the old domain state.

Signed-off-by: buxiasen <buxiasen@xiaomi.com>
2024-05-15 16:32:41 -03:00
Ivan Palijan
fcbae598e4 Added support in Nucleo-L476RG board for MPU9250 sensor. 2024-05-15 23:54:30 +08:00