sergiotarxz/nuttx
1
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity
2,937 Commits 1 Branch 0 Tags 291 MiB
3bb6a8b164
Commit Graph

2113 Commits

Author SHA1 Message Date
Gregory Nutt
f69688422f SAMA4 EHCI: Correct some backward conditional compilation; fix some warnings 2013-08-26 17:03:52 -06:00
Gregory Nutt
56f2b3b963 Add a new method to the USB host driver interface: getdevinfo. This method will return information about the currently connected device. At present, it only returns the device speed. The speed is needed by the enumeration logic in order to set a credible initial EP0 max packet size 2013-08-26 15:46:16 -06:00
Gregory Nutt
f500338401 SAMA5 EHCI: Status phase is the opposite direction as the data phase 2013-08-26 14:28:13 -06:00
Gregory Nutt
78812d5b80 SAMA5 EHCI: Taking direction from wrong bit in SETUP request; need to flush data buffer before starting SETUP request 2013-08-26 11:05:23 -06:00
Gregory Nutt
57eb83da9d #17 Fix if CONFIG_SDIO_BLOCKSETUP defined, OS will crash. From CCTSAO 2013-08-26 08:54:46 -06:00
Gregory Nutt
250956c803 SAMA5 EHCI: Data toggle and status phase fixes 2013-08-25 14:45:08 -06:00
Gregory Nutt
d35e1c6bd4 EHCI reset bit was not being set correctly 2013-08-25 10:46:41 -06:00
Gregory Nutt
21566c02d6 SAMA5 OHCI: Fix semaphore handling bug. OHCI is now function by itself again after changes to integrate with EHCI 2013-08-25 08:57:35 -06:00
Gregory Nutt
254ebdaa4c SAMA5 OHCI: Fix backward conditional compilation. Clean-up OHCI/EHCI debug output 2013-08-25 08:30:21 -06:00
Gregory Nutt
02fc7a5a08 SAMA5D3x-EK: Fix some backward conditional compilation 2013-08-24 14:06:47 -06:00
Gregory Nutt
26c03779f8 SAMA5: OHCI various bugfixes for interrupt handling 2013-08-24 13:03:15 -06:00
Gregory Nutt
28a103f1f2 SAMA5: EHCI now handles low- and full-speed connections by giving them to OHCI; OHCI now uses the work queue to defer interrupt processing; If both OHCI and EHCI are enabled, EHCI is the master of the UHPHS interrupt 2013-08-24 11:34:24 -06:00
Gregory Nutt
1f3cebdb40 SAMA5 EHCI: Added logic to detect port speed. Handling is insufficient 2013-08-24 07:36:05 -06:00
Gregory Nutt
3786e72947 Fix #endif with missing #if condition. Reported by Andrew Bradford 2013-08-23 16:40:30 -06:00
Gregory Nutt
d7cba5e5ca SAMA5/ECHI: Debug register access, add logic to determine transfer size, fix setting of control bit in token 2013-08-23 16:23:15 -06:00
Gregory Nutt
e36a0e868d SourceForge bug #16 Fix IO pin map. Add CONFIG_SERIAL_TERMIOS support. From CCTSAO 2013-08-23 11:48:53 -06:00
Gregory Nutt
1383701e7e SAMA5 EHCI: cosmetic changes 2013-08-23 11:26:17 -06:00
Gregory Nutt
189174e26b SAMA5: Add support for sharing ports when both OHCI and EHCI are enabled 2013-08-23 10:58:30 -06:00
Gregory Nutt
e59924a9e6 SAMA5 EHCI: Fix some list traversal bugs 2013-08-22 19:32:24 -06:00
Gregory Nutt
b7330bc849 SAMA5 EHCI: Initial debug changes 2013-08-22 17:25:00 -06:00
Gregory Nutt
e581bfeb29 SAMA5 EHCI: No complete for bulk and control endpoints 2013-08-22 13:36:16 -06:00
Gregory Nutt
ea2e4c11f8 SAMA5 EHCI: Add data transfer logic for asynchronous endpoints 2013-08-22 10:27:46 -06:00
Gregory Nutt
da3ff83fc3 SAMA5 EHCI: Add IOC error handling 2013-08-22 09:23:01 -06:00
Gregory Nutt
73efdf8d05 SAMA5 EHCI: transfer termination logic. Incomplete 2013-08-21 17:08:12 -06:00
Gregory Nutt
f831c8fe94 SAMA5 EHCI: Hardware initialization logic 2013-08-21 13:45:54 -06:00
Gregory Nutt
c109c39be7 Move all SAMA5 EHCI interrupt handling to the worker thread 2013-08-21 11:07:42 -06:00
Gregory Nutt
9f6ae9332f SAMA5 EHCI: At list-oriented cache operations 2013-08-20 18:06:04 -06:00
Gregory Nutt
514826eeb1 Add SAMA5 EHCI list traversal logic 2013-08-20 17:01:30 -06:00
Gregory Nutt
6a79cea2c0 Beginning of support for SAMA5 EHCI. Not much there yet 2013-08-20 15:46:36 -06:00
Gregory Nutt
609dc65235 Add kernel/user memalign functions. Not fully integrated 2013-08-20 13:04:49 -06:00
Gregory Nutt
4d5789dfdd SAMA5 OHCI+EHCI mostly cosmetic changes 2013-08-19 15:03:14 -06:00
Gregory Nutt
4bf3dbe149 USB host: Add device address management support in preparation for USB hub support 2013-08-18 14:31:57 -06:00
Gregory Nutt
a6e6b4ba2d Add few more EHCI definitions 2013-08-18 13:01:13 -06:00
Gregory Nutt
07bd7c2168 STM32 F1 I2C: Fix a typo that crept in with some recent changes. From Yiran Liao 2013-08-18 07:45:14 -06:00
Gregory Nutt
b33de2b618 Add EHCI header file (not quite complete) 2013-08-17 14:19:18 -06:00
Gregory Nutt
a0837fca6c SAMA5 OHCI: Driver is now basically functional 2013-08-16 13:13:21 -06:00
Gregory Nutt
db42d9350c SAMA5 OHCI: Re-organize some endpoint list data structures.. Strange things happen when semaphores lie in DMA memory which is occasionally invalidated 2013-08-16 11:36:51 -06:00
Gregory Nutt
ddc93e1da3 STM32 SPI: nbits interface extended to handle LSB- or MSB-first operation. From Teemu Pirinen 2013-08-16 11:35:22 -06:00
Gregory Nutt
94bcdc66b0 SAMA5 OHCI: Don't prealloc RH port TDs and EDs. Allocate from a free list like other cases 2013-08-15 17:15:08 -06:00
Gregory Nutt
41c068f652 SAMA5 OHCI: Fix errors in cache handling; Don't add ED to control list until port is connected 2013-08-15 15:28:27 -06:00
Gregory Nutt
e23a92243c SAMA5: ports should not be reset state (seems to make no difference) 2013-08-14 17:33:31 -06:00
Gregory Nutt
49f3831e11 SAMA5: Alternatie clock configuration that yields a perfect 48MHz full speed USB clock and a CPU clock of 384MHz 2013-08-14 15:16:04 -06:00
Gregory Nutt
e32b60a78c SAMA5 OHCI: Use physical address and flush and/or invalidate data caches as necessary 2013-08-14 12:23:06 -06:00
Gregory Nutt
bdbe4a4f25 Clean up some LP17xx and STM32 USB host configuration compilation errors due to the massive changes to the USB host interfaces needed to support the SAMA5 2013-08-13 17:43:19 -06:00
Gregory Nutt
8f429fd54d SAMA5: Major restructuring of the the OHCI driver drivers to better handle the multiple root hub ports and concureent transfers on each port. 2013-08-13 16:48:14 -06:00
Gregory Nutt
34418d12bb Separate wait() and enumerate() methods from struct usbhost_driver_s and move to new interface, struct usbhost_connection_s. This is part of the necessary restructuring of the USB host interface to support multiple root hub ports. 2013-08-13 15:03:46 -06:00
Gregory Nutt
b4645f73ec Back out most of the changes of 3b04d08043742b9e65cf38d45988b35bff91daed 2013-08-13 14:12:27 -06:00
Gregory Nutt
d0fbea35eb Separate SAMA5 OHCI interrupt handling into separate functions 2013-08-13 13:34:35 -06:00
Gregory Nutt
7339c1c5e6 SAMA5 OHCI: Fix some erors in the loop that waits for device connection changes 2013-08-13 09:44:16 -06:00
Gregory Nutt
6d72cccdf0 Fix re-entry problem in SAMA5 up_putc 2013-08-13 09:42:40 -06:00
Gregory Nutt
f3bfd6a515 STM32 F3 fixes from John Wharington 2013-08-13 07:48:18 -06:00
Gregory Nutt
a4c195482f More changes to USB host interface to support multiple downstream ports 2013-08-12 16:29:33 -06:00
Gregory Nutt
39696cbf96 First of several changes needed to support multiple USB host root hubs 2013-08-12 14:44:06 -06:00
Gregory Nutt
f5a0ce709c SAMA5: Add logic to control VBUS power for OHCI 2013-08-12 11:59:10 -06:00
Gregory Nutt
dfe6452b8e Add untested OHCI driver for the SAMA5; structure naming and header files for USB host initialization prototypes 2013-08-11 17:11:32 -06:00
Gregory Nutt
9cf1365cde SAMA5: Some improvements to the HSCMI card removal/insertion logic 2013-08-11 11:13:11 -06:00
Gregory Nutt
69bc6afbd3 Add CAN configuration to STM32 config menu 2013-08-10 19:37:35 -06:00
Gregory Nutt
03130ca5a3 STM32: Fix STM32 serial init for non-reordered serial ports. From Lorenz Meier 2013-08-10 19:33:16 -06:00
Gregory Nutt
217ed87aad Added option to disable STM32 serial port re-ordering 2013-08-10 19:29:44 -06:00
Gregory Nutt
3c38992727 SAMA5: Fix HSMCI race condition. Now memory card interface is functional with DMA 2013-08-10 18:01:23 -06:00
Gregory Nutt
6622714c5d Rearrange configuration settings so that ARCH_HAVE_SDIO is moved to higher, sharable level 2013-08-10 09:06:53 -06:00
Gregory Nutt
75d0fc2a10 Extend the virtual-to-physical address conversion logic to handle NFS SRM, UDPH SRAM, and external SRAM and PSRAM. 2013-08-09 17:55:27 -06:00
Gregory Nutt
d8b3921972 SAMA5: Centralize logic for conversion between physical and virtual addresses 2013-08-09 17:25:53 -06:00
Gregory Nutt
ad6b8726c2 Fix some cache-related issues with the SAMA5 DMA driver 2013-08-09 15:25:13 -06:00
Gregory Nutt
a2ba8992a9 SAM3,4,A5 DMA fixes; SAMA5 SPI driver now supports DMA transfers 2013-08-09 13:12:16 -06:00
Gregory Nutt
2b36e7e266 SAMA5: Use RDR/TDR registers for DMA, not FIFO registers; change DMA bit settings to match Atmel example. Still no DMA 2013-08-08 15:51:16 -06:00
Gregory Nutt
53c4a1e647 SAMA5 DMA: Need to flush caches; DMA channel depends upon direction of DMA; the maximum transfer size in bytes depends on the number of bytes per transfer 2013-08-08 13:15:52 -06:00
Gregory Nutt
05242e41ef More SAMA5 DMAC driver fixes. Still does not work. 2013-08-07 17:19:48 -06:00
Gregory Nutt
e015c6edd6 SAMA3,4,A5: Misc corrections to DMA and HSMCI drivers 2013-08-07 11:32:08 -06:00
Gregory Nutt
159635bc2a Fix SAM bug: Parmaters reversed in DMA function call 2013-08-06 15:47:09 -06:00
Gregory Nutt
d1da100cf0 SAM3,4,A5 DMAC driver fixes 2013-08-06 13:27:48 -06:00
Gregory Nutt
03f24c7a1d SAM3,4,A5: Fix some masked status checks that can generate false error reports 2013-08-06 12:36:56 -06:00
Gregory Nutt
dfe42d0254 SAMA5: A few early, easy bug fixes. The rest will all be difficult 2013-08-06 11:29:53 -06:00
Gregory Nutt
e8a34ea3ac SAMA5: Add PIO interrupt support. Massive name changes for consistency in PIO vs GPIO naming. SAMA5D3x-EK: Add support for SD card detection PIO interrupts 2013-08-06 10:20:17 -06:00
Gregory Nutt
a68a3a0366 SAMA5: Add HSMCI memory card driver support 2013-08-05 16:21:24 -06:00
Gregory Nutt
cff3e713f1 SAMA5: SPI Driver + AT25 FLASH work; SAM3/4: Correct an error, SPI will not be correctly configured if CONFIG_SPI_OWNBUS=n 2013-08-05 10:29:43 -06:00
Gregory Nutt
36f4cb53dd SAMA5: Add logic to auto-mount a file system on AT25 SPI FLASH for NSH 2013-08-05 08:24:39 -06:00
Gregory Nutt
412aaa83a2 SAMA5D3x-EK: At support for the AT25 serial FLASH 2013-08-04 16:56:41 -06:00
Gregory Nutt
5fe6e4df26 SAMA5: Add register level debug option for SPI 2013-08-04 14:45:24 -06:00
Gregory Nutt
d516baa73f SAMA5: SPI driver now supports both SPI0 and SPI1 2013-08-04 12:50:20 -06:00
Gregory Nutt
487866b2b6 SAMA5: Add basic SPI suppport (untested) 2013-08-04 11:08:20 -06:00
Gregory Nutt
8194e6bbcf SAMA5: Add DMA suppport (untested) 2013-08-04 10:44:18 -06:00
Gregory Nutt
a93b095ce4 SAMA5: Add DMA controller register definitions 2013-08-03 12:13:42 -06:00
Gregory Nutt
8b317e9ea3 Standard configuration variables used to enable interupt controller debug; SAMA5: Correct handling of spurious interrupts 2013-08-03 08:22:37 -06:00
Gregory Nutt
c7293535fe Various changes to get SAMA5 SDRAM working. Marginally functional, but there is more to be done 2013-08-02 18:30:27 -06:00
Gregory Nutt
08a1ff5c79 Correct some typos int he MPADDRCS register address definitions 2013-08-02 12:06:11 -06:00
Gregory Nutt
b00d72a7f2 SAMA5: More MMU-related changes to properly initialize SDRAM 2013-08-02 11:11:57 -06:00
Gregory Nutt
894618f894 SAMA5: Add logic to initialize SAMA5D3x-EK on-board SDRAM 2013-08-01 16:58:55 -06:00
Gregory Nutt
70e1028d41 SAMA5: Add DDR controller register definitions 2013-08-01 12:27:41 -06:00
Gregory Nutt
35c3a49e1c ARMv7-A: Map all of .text, .bss, .data., stacks before enabling the MMU and caching. This is simpler and avoids fears I have about caching 2013-08-01 10:05:33 -06:00
Gregory Nutt
f0e6d4f101 ARMv7-A: Separate CONFIG_PAGING start-up logic into a different startup file. Too much conditional compilation. 2013-08-01 07:41:00 -06:00
Gregory Nutt
b0045bc7e2 SAMA5: Add an NSH configuration of the SAMA5D3x-EK board 2013-07-31 10:46:13 -06:00
Gregory Nutt
8695c89aa4 SAMA5: Modification of some CPSR-related inline functions 2013-07-31 09:11:24 -06:00
Gregory Nutt
db20c5fc43 Fix Cortex-A CPSR register field definition 2013-07-30 19:05:24 -06:00
Gregory Nutt
391d300d4d SAMA5: Change mapping of vector tables to work around that fact that I don't understand how the AXI MATRIX remap works 2013-07-30 16:19:52 -06:00
Gregory Nutt
16371b50e4 ARMv7-A: Add cp15_disable_dcache(); SAMA5: nor_main.c no disables MMU and caches; Should not remap ISRAM to address 0x0 unless we booted into ISRAM 2013-07-30 13:20:33 -06:00
Gregory Nutt
6f99994722 More DAC changes from John Wharington 2013-07-30 11:41:53 -06:00
Gregory Nutt
b75a0cf8be Add ARMv7-A irqdisable() inline function 2013-07-30 11:37:09 -06:00
Gregory Nutt
84150fd7ed STM32 F3 I2C driver from John Wharington 2013-07-30 10:35:17 -06:00
Gregory Nutt
4bdcceb3b3 STM32 DAC DMA fixes from John Wharington 2013-07-30 08:54:32 -06:00