This allows properly using 10/100Mbps also with 1G phy. Some gigabit PHYs
come out of reset with 1G advertisement enabled, causing other devices to
set up link with 1G. If, after this, the link is set to 10/100 on the mpfs,
the link won't work.
Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
Summary:
- In RISC-V, BUILD_KERNEL uses S-mode and to use M-mode timer
we need to handle it by using OpenSBI or self-implementation.
- This commit adds M-timer self-implementation for BUILD_KERNEL.
Impact:
- qemu-rv only
Testing:
- Tested with rv-virt:knsh64 on qemu-6.2
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Summary:
- I found inappropriate SET_CSR() usage in the function.
- This PR fixes this issue.
Impact:
- None
Testing:
- tested with rv-virt:knsh64
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Add initial support for the I2S peripheral on ESP32.
Add I2S character driver and generic I2S audio driver.
Include i2schar defconfig for ESP32-DevKitC board.
When compiling my project, the time to generate allsyms decreased from tens of seconds to 2 seconds
Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
Fixes minor issue with a trace (build failure with -Werror):
libelf/libelf_symbols.c:310:41: error: pointer of type 'void *' used in arithmetic [-Werror=pointer-arith]
310 | (uintptr_t)(sym->st_value + symbol->sym_value));
In SMP mode, if all cores start at same time, all from __start(),
then only primary need do initialize, so others core should wait
primary, use 'sev' let the non-primary continue to __cpuN_start().
Signed-off-by: ligd <liguiding1@xiaomi.com>
Summary:
- I noticed that the OpenSBI library depends on the BSD license
- This commit fixes this issue
Impact:
- None
Testing:
- Build only
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Summary:
- I noticed that the OpenSBI library depends on the BSD license
- This commit fixes this issue
Impact:
- CONFIG_OPENSBI=y only
Testing:
- Build with icicle:opensbi (will be updated later)
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Optimize sched_note_begin/end, replace note_printf with note_string
sched_note_begin/end optimized from 50us to 1us per consumption
Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
NON-primary cpu will invalidate cpu0's cache L2, that will caused cpu0's data mismatch, and then system crash
Signed-off-by: ligd <liguiding1@xiaomi.com>
The IDMA needs to have 32 bit word alignment, in fact it will
AND off the lower 2 bits of the value stored in IDMABASE0R.
This bug was masked by CONFIG_ARMV7M_DCACHE causing proper word alignment
and also FAT_DMAMEMORY being aligned.
This commit extends the unaligned logic (used for dcache) to take into account
the need for a buffer copy when the buffer is ot 32 bit word.
It leverages the fact that when CONFIG_ARMV7M_DCACHE is not defined the up_xxxxx_dcache are nops.
