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17454 Commits

Author SHA1 Message Date
hotislandn
f16a0a7380 arch:rv64:keep the stack to be 16bytes aligned. 
Signed-off-by: hotislandn <hotislandn@hotmail.com>
 2021-03-17 19:50:35 -07:00
Abdelatif Guettouche
27d5c9340a esp32_allocateheap.c: Don't allocate the ROM CPU regions the same way in 
QEMU, the image is different.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-03-18 11:28:36 +09:00
Nathan Hartman
5b813f0c14 arch/stm32l4: Fix nxstyle errors 
arch/arm/include/stm32l4/stm32l4x3xx_irq.h:
arch/arm/include/stm32l4/stm32l4xrxx_irq.h:

    * Fix nxstyle errors.
 2021-03-17 21:49:30 +01:00
Xiang Xiao
335ba21657 arch/arm: Fix syscall number out of swi range in thumb mode 
The immediate number is 8bits in thumb mode:
+---------------------+---------------+
|15 14 13 12 11 10 9 8|7 6 5 4 3 2 1 0|
+---------------------+---------------+
| 1  1  0  1  1  1 1 1|      imm8     |
+---------------------+---------------+

The immediate number is 24bits in arm mode:
+-----------+-------------------------------------------------------------------------+
|31 30 29 28|27 26 25 24|23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0|
+-----------+-----------+-------------------------------------------------------------+
|   cond    | 1  1  1  1|                                imm24                        |
+-----------+-----------+-------------------------------------------------------------+

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I62503cdc377fcee81864e88e981d389bce2e1b45
 2021-03-17 14:52:58 -03:00
Jiuzhu Dong
e96c8b9283 fs: allocate file/socket dynamically 
Change-Id: I8aea63eaf0275f47f21fc8d5482b51ffecd5c906
Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
 2021-03-17 06:46:42 -07:00
SPRESENSE
2f29521dd1 cxd56_cpu1signal: Fix an issue that gnss does not work 
Because a thread of gnss receiver is created by pthread in the
AppBringUp task, the thread would be killed when AppBringUp
task exits.
Change to use kthread_create instead of pthread_create to prevent
this issue.
 2021-03-17 06:36:33 -07:00
SPRESENSE
f7047d8ea3 cxd56_gnss: Add missing include header for cxd56_gnss.c 
cxd56_gnss.c uses file descriptor operation from next change.
 0536953 Kernel module should prefer functions with nx/kmm prefix

But this change need to add fcntl.h in include header.
So, add missing header.
 2021-03-17 03:11:54 -07:00
YAMAMOTO Takashi
9bd10898d2 arch/arm/src/lc823450: Make LC823450_IPL2 select BCH 2021-03-17 01:25:16 -07:00
Peter van der Perk
4dd457854d [FlexCAN] Correct reset state for CTRL1 register 2021-03-16 19:50:58 -07:00
Nathan Hartman
f165270a80 arch/stm32l4: Fix nxstyle errors 
arch/arm/include/stm32l4/chip.h:
arch/arm/include/stm32l4/irq.h:
arch/arm/include/stm32l4/stm32l4x5xx_irq.h:
arch/arm/include/stm32l4/stm32l4x6xx_irq.h:

    * Fix nxstyle errors.
 2021-03-16 19:38:30 -07:00
Michael Jung
b3ab373f3a stm32l5: Fix findings with latest nxstyle 
Fix some incorrect relative file paths in ASF headers found with the
latest version of nxstyle.

Signed-off-by: Michael Jung <mijung@gmx.net>
 2021-03-16 12:04:00 -07:00
Michael Jung
fb14125320 stm32l5: Coding style fixes 
Put blanks around the '+' in register address definitions.

Signed-off-by: Michael Jung <mijung@gmx.net>
 2021-03-16 12:04:00 -07:00
Michael Jung
3581289661 stm32l5: Put a timeout on waiting for LSE 
Do not run into an infinite loop if the LSE does not start up.

Signed-off-by: Michael Jung <mijung@gmx.net>
 2021-03-16 12:04:00 -07:00
Michael Jung
c031e4d2ee stm32l562xx_pinmap.h: Coding style fix 
Remove spaces around binary-or operators in GPIO defines everywhere to
get a consistent coding style.

Signed-off-by: Michael Jung <mijung@gmx.net>
 2021-03-16 12:04:00 -07:00
Michael Jung
8e14cb6065 stm32l5: Remove drive strengths from GPIO defines 
As proposed by David Sidrane.  Required drive strength is board specific
and should be defined in the respective board.h file.

Signed-off-by: Michael Jung <mijung@gmx.net>
 2021-03-16 12:04:00 -07:00
Michael Jung
78a69a89d8 stm32l5: Remove unused CACHE_LINESIZE defines 
Cortex-M33 does neither have an I- nor a D-Cache.  Both defines are not
used across the stm32l5 architecture code.  Thus, just remove them.

_Originally posted by @acassis in https://github.com/apache/incubator-nuttx/pull/2974#discussion_r588224862_

Signed-off-by: Michael Jung <mijung@gmx.net>
 2021-03-16 12:04:00 -07:00
Michael Jung
33892dcc54 armv8-m/arm_svcall.c: Fix compiler warning 
regs[REG_R0] is uint32_t type, but '%d' expects int type.

Signed-off-by: Michael Jung <mijung@gmx.net>
 2021-03-16 12:04:00 -07:00
Michael Jung
f3a5675cc4 stm32l5: Architecture Support for STM32L5 
Architecture support for STMicroelectronics STM32L552xx and STM32L562xx
MCUs.  This is based on corresponding code for STM32L4, but has been
considerably adjusted.  Tested with Nucleo-L552ZE-Q and STM32L562E-DK
boards with simple NSH configurations.

Signed-off-by: Michael Jung <mijung@gmx.net>
 2021-03-16 12:04:00 -07:00
hotislandn
fb7a5b86ca arch:rv64:c906:demo protect build without PMP. 
Signed-off-by: hotislandn <hotislandn@hotmail.com>
 2021-03-16 11:43:10 -03:00
Dong Heng
458caf2732 riscv/esp32c3: Add ESP32-C3 WLAN netcard driver 2021-03-16 10:42:32 -03:00
Dong Heng
b2f5031e96 xtensa/esp32: Refactor ESP32 WiFi driver to support station and softAP coexistence 2021-03-16 10:20:59 -03:00
Abdelatif Guettouche
28160823b6 arch/xtensa/esp32: ~6KB of memory at address 0x3ffae6f0 is not used by 
the ROM bootloader, add that to the heap as well.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-03-16 16:22:08 +09:00
Abdelatif Guettouche
8389e83742 esp32/memory_layout.h: Update the layout taking under consideration the 
changes to the heap regions and to the internal heap.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-03-16 16:22:08 +09:00
Abdelatif Guettouche
9cfc30fa85 memory_layout.h: Fix the start of region2 when a QEMU image generation 
is enabled.

That region is technically part of the PRO CPU and we should be able to
allocate it early.  However, QEMU uses a slightly different bootloader
image that uses the same part for both CPU.  So, when APP CPU starts
during the SMP bring up it will corrupt some data.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-03-16 16:22:08 +09:00
Abdelatif Guettouche
7fbc350589 xtensa/esp32: Warn about unused memory regions. 
In case CONFIG_MM_REGIONS doesn't include all the available memory
regions the user will have a warning to increase it.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-03-16 16:22:08 +09:00
Abdelatif Guettouche
5c7d041b91 arch/xtensa/esp32: In SMP case move the internal memory to region 3. 
Region 2 is only 15KB in SMP, so we don't have enough memory to play
with.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-03-16 16:22:08 +09:00
Abdelatif Guettouche
cba44928d2 arch/xtensa/esp32: Part of the ROM regions in middle of DRAM are not 
used, retrieve them as heap.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-03-16 16:22:08 +09:00
Abdelatif Guettouche
a68a39c785 xtensa/esp32: Move internal heap to the beginning of region 2. 
Internal heap was occupying the region straight after .data up to
HEAP_REGION1.  The issue with this is if static allocation is large,
we'll end up with too little memory left for the internal heap.
Moving it to the beginning of region 2 gives us more room to play with.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-03-16 16:22:08 +09:00
Nathan Hartman
13816de7ac arch/stm32f7: Fix nxstyle errors 
arch/arm/include/stm32f7/chip.h:
arch/arm/include/stm32f7/irq.h:
arch/arm/include/stm32f7/stm32f72xx73xx_irq.h:
arch/arm/include/stm32f7/stm32f74xx75xx_irq.h:
arch/arm/include/stm32f7/stm32f76xx77xx_irq.h:

    * Fix nxstyle errors.
 2021-03-15 17:01:31 +01:00
Masayuki Ishikawa
73786e71ff arch: sam34: Author Masayuki Ishikawa: Update license to Apache 
Signed-off-by: Masayuki Ishikawa <asayuki.Ishikawa@jp.sony.com>
 2021-03-14 22:23:05 -07:00
Yuichi Nakamura
40fe666d3f arm/rp2040: Fix SPI halfword DMA transfer 2021-03-14 22:21:22 -07:00
Sara Souza
4ca0c6e3c8 xtensa/esp32: timer driver refactor 2021-03-14 20:22:36 -03:00
Abdelatif Guettouche
65a7ecec09 arch/risc-v: Remove a declaration of "up_boot" function that was never used. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-03-13 19:07:02 -03:00
Abdelatif Guettouche
ea0dc8c1d2 arch/risc-v: up_allocate_heap is already declared in nuttx/arch.h 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-03-13 19:07:02 -03:00
Abdelatif Guettouche
44ada05549 arch/risc-v: Internal functions should be prefixed with riscv_ not up_ 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-03-13 19:07:02 -03:00
Alin Jerpelea
f7c11c92c3 arch: Makefile: Alan Carvalho de Assis: update licenses to Apache 
Alan Carvalho de Assis has submitted the SGA and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-03-13 05:56:43 -08:00
Alin Jerpelea
bd94263a33 arch: Makefile: Author Gregory Nutt: update licenses to Apache 
Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-03-13 05:56:43 -08:00
David Sidrane
0c57351f78 mmcsd:Stuck in 1-bit mode, Removed CONFIG_ARCH_HAVE_SDIO_DELAYED_INVLDT 
mmcsd:Remove CONFIG_ARCH_HAVE_SDIO_DELAYED_INVLDT
   stm32h7:sdmmc remove CONFIG_ARCH_HAVE_SDIO_DELAYED_INVLDT
   stm32f7:sdmmc remove CONFIG_ARCH_HAVE_SDIO_DELAYED_INVLDT
   stm32f7:sdmmc WRITE COMPLETE prevent false triggers
   stm32h7:sdmmc WRITE COMPLETE prevent false triggers

   While testing PR #2989 on the H7 I noticed that the cards
   were staying in 1-bit mode. The root cause was that the
   scr read path was using DMA without an invlidate.

   This was caused by CONFIG_ARCH_HAVE_SDIO_DELAYED_INVLDT,
   but the sdmmc driver, did not use the delayed invalidate
   nor would it work on 8 bytes.

   The driver fully supported dcache mgt on runt buffers, but
   the #ifdef CONFIG_ARCH_HAVE_SDIO_DELAYED_INVLDT blocked it.

   Reviewing the PR that added CONFIG_ARCH_HAVE_SDIO_DELAYED_INVLDT
   it may have been valid at the time. But after the dcache operations
   we fixed. It is not necessary and offers no benefit.
 2021-03-12 16:42:16 -03:00
Nathan Hartman
6061981e37 arch/stm32h7: Fix nxstyle errors 
arch/arm/include/stm32h7/irq.h:
arch/arm/include/stm32h7/stm32h7x7xx_irq.h:

    * Fix nxstyle errors.
 2021-03-12 16:58:51 +00:00
Sara Souza
d28962bbc0 risc-v/esp32-c3: Adds termios support. 2021-03-12 08:41:51 +00:00
YAMAMOTO Takashi
51be5c08bf arch/sim/include/limits.h: Fix the type of LONG_MIN, LONG_MAX, ULONG_MAX 2021-03-12 16:23:26 +08:00
Masayuki Ishikawa
bb255d075c arch: risc-v: Author Masayuki Ishikawa: Update license to Apache 
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
 2021-03-12 16:15:44 +08:00
Masayuki Ishikawa
9aaa4068c1 arch: imx6: Fix an error message in imx_enet.c 
Summary:
- This commit fixes an error message in imx_enet.c

Impact:
- None

Testing:
- Build only

Suggested-by: David Sidrane <David.Sidrane@NscDg.com>
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
 2021-03-12 11:30:08 +08:00
Gustavo Henrique Nihei
d87274c123 risc-v/esp32c3: Release stuck I2C slaves on Reset 2021-03-11 19:32:03 -03:00
Gustavo Henrique Nihei
cb1c415b46 risc-v/esp32c3: Add support for I2C tracing 2021-03-11 19:32:03 -03:00
Gustavo Henrique Nihei
0f508c1a5f risc-v/esp32c3: Fix erroneous index for I2C IRQ 2021-03-11 19:32:03 -03:00
Gustavo Henrique Nihei
0b672b9c57 risc-v/esp32c3: Fix I2C timeout register mask 2021-03-11 19:32:03 -03:00
Gustavo Henrique Nihei
11b1f0f9dd risc-v/esp32c3: Add driver for I2C peripheral 2021-03-11 19:32:03 -03:00
Yuichi Nakamura
174a4c1b68 arm/rp2040: Add RP2040 GPIO interrupt functions 2021-03-11 19:31:17 -03:00
Nathan Hartman
9fd0df3931 arch/stm32: Fix nxstyle errors 
arch/arm/include/stm32/stm32f10xxx_irq.h:
arch/arm/include/stm32/stm32f20xxx_irq.h:
arch/arm/include/stm32/stm32f30xxx_irq.h:
arch/arm/include/stm32/stm32f33xxx_irq.h:
arch/arm/include/stm32/stm32f37xxx_irq.h:
arch/arm/include/stm32/stm32l15xxx_irq.h:

    * Fix nxstyle errors.
 2021-03-11 21:39:27 +00:00