Commit Graph

11 Commits

Author SHA1 Message Date
Alin Jerpelea
dade0c36ca NuttX: Mateusz Tomasz Szafoni: update licenses to Apache
Mateusz Tomasz Szafoni has submitted the ICLA and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-01 12:13:12 -05:00
Fotis Panagiotopoulos
09b6aca971 nxstyle fixes. 2020-12-02 11:27:15 -08:00
Fotis Panagiotopoulos
f538839720 FLASH waiting cycles are configured based on HCLK. 2020-12-02 11:27:15 -08:00
Xiang Xiao
80277d1630
Refine the preprocessor conditional guard style (#190) 2020-01-31 19:07:39 +01:00
Mateusz Szafoni
a9626f3ad3 /arch/arm/src/stm32: Bring in some mostly cosmetic updates from PR783 (most of the PR is going to the stm32f0l0 directory). 2018-12-18 10:53:49 -06:00
Gregory Nutt
ceaafc2019 arch/arm/src/stm32: Fix scope of naming. CONFIG_RTC_LSECLOCK->CONFIG_STM32_RTC_LSECLOCK, for example. Fix some usage. Although CONFIG_STM32L4_RTC_xxxCLOCK was defined in the Kconfig, CONFIG_RTX_xxxCLOCK was used in numerous places in the code 2018-06-28 15:58:08 -06:00
Gwenhael Goavec-Merou
5ec2b9d6fe arch/arm/src/stm32/stm32f33xxx_rcc.c: A flash wait state configuration. Flash latency must be fixed according to sysclk frequency. If this operation
is not done or done after PLL configuration, the STM32 fail to continue boot
operation if the frequency if greater than 24MHz.  This common t add this operation according to the board variable STM32_SYSCLK_FREQUENCY.  Tested on stm32f334-disco board.
2018-02-17 12:27:29 -06:00
raiden00pl
83699beb10 stm32f33xxx_rcc: fix CAN clock enable 2017-11-22 09:26:07 +01:00
raiden00pl
715d6fa9ff stm32f33xxx_rcc: cleanup + move hrtim clock source selection 2017-06-26 18:30:10 +02:00
Mateusz Szafoni
437ad3ccb2 STM32F33: Fix hrtim definitions, Add beginning of HRTIM driver 2017-06-11 10:49:20 -06:00
raiden00pl
3175b74428 Add basic support for the STM32F334 2017-02-26 12:39:44 +01:00