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19 Commits

Author SHA1 Message Date
Gregory Nutt
6cd282ccc2 Add new common lazy FPU state saving option for ARMv7-M. Not yet verified 2015-03-06 08:26:43 -06:00
Gregory Nutt
e3ff0689bb Rename CONFIG_NUTTX_KERNEL to CONFIG_BUILD_PROTECTED; Partially integrate new CONFIG_BUILD_KERNEL 2014-08-29 14:47:22 -06:00
Gregory Nutt
043c384e38 ARMv7-A: Add SYSCALL handling logic 2014-08-28 14:52:14 -06:00
Gregory Nutt
9aba7598b0 Change bne to bne.n in irqrestore() 2014-05-22 09:01:25 -06:00
Gregory Nutt
c3cbb6546a ARMv6-M/ARMv7-M: Correct a register handling error in signal delivery (Kernel build mode only). Noted by Mike Smith. 2014-02-23 08:25:49 -06:00
Gregory Nutt
5ec812ff77 Fix major misthink in Cortex-M0 port: The Cortex-M0 has no BASEPRI register. We have to revert to using the nasty PRIMASK register 2013-04-16 18:00:59 -06:00
patacongo
56ce985e7f Add support for nested system calls 
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5752 42af7a65-404d-4744-a932-0658087f49c3
 2013-03-17 16:13:28 +00:00
patacongo
b3890db5ce Add support for calling to and returning from signal handlers in in user-mode threads 
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5750 42af7a65-404d-4744-a932-0658087f49c3
 2013-03-17 00:40:49 +00:00
patacongo
8bba3440a3 More MPU-related fixes 
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5746 42af7a65-404d-4744-a932-0658087f49c3
 2013-03-16 00:34:43 +00:00
patacongo
93967f8b7f Fix some ARMv7-M syscall logic 
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5736 42af7a65-404d-4744-a932-0658087f49c3
 2013-03-12 21:53:18 +00:00
patacongo
466efbd35c Fix some bad syscall dispatching log. This change is not testable until these is a tested NuttX kernel build. 
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5713 42af7a65-404d-4744-a932-0658087f49c3
 2013-03-06 19:56:32 +00:00
patacongo
f0c357cd5a More logic to use BASEPRI to control interrupts -- still doesn't work 
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5547 42af7a65-404d-4744-a932-0658087f49c3
 2013-01-22 14:37:17 +00:00
patacongo
b3ed93854b Add option to use BASEPRI instead of PRIMASK to disable interrupts in all ARMv7-M architectures 
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5546 42af7a65-404d-4744-a932-0658087f49c3
 2013-01-22 01:25:40 +00:00
patacongo
7a2692df6a Resync new repository with old repo r5166 
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5154 42af7a65-404d-4744-a932-0658087f49c3
 2012-09-17 18:35:37 +00:00
patacongo
1e145dddae Incoporate (more) new ARMv7-M exception handling logic contributed by Mike Smith 
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4414 42af7a65-404d-4744-a932-0658087f49c3
 2012-02-22 18:44:34 +00:00
patacongo
cb32f5c1a4 Incoporate new ARMv7-M exception handling logic contributed by Mike Smith 
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4413 42af7a65-404d-4744-a932-0658087f49c3
 2012-02-22 18:14:18 +00:00
patacongo
b6bcb2aecc Add support for the Cortex-M4 floating pointing 
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4144 42af7a65-404d-4744-a932-0658087f49c3
 2011-12-07 18:58:21 +00:00
patacongo
55399677c6 Add storage space for FPU registers in context switching 
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4143 42af7a65-404d-4744-a932-0658087f49c3
 2011-12-07 15:36:46 +00:00
patacongo
9c89c16a7c Name change: Change Cortex-M3 naming to ARMv7-M naming so support Cortex-M4 
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3846 42af7a65-404d-4744-a932-0658087f49c3
 2011-08-05 21:57:49 +00:00