zhuyanlin
7b32ce190e
xtensa:esp32: setup software interrupt. (bit 29)
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Enable and setup software interrupt.
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2022-02-24 00:06:43 +01:00
zhuyanlin
9ea7676731
arch:xtensa: rename XCHAL_INT_NLEVELS to XCHAL_NUM_INTLEVELS
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The name used in Tensilica support file core-isa.h for all vendors is
`XCHAL_NUM_INTLEVELS`.
Use a new name may be confused by newer porting xtensa arch.
Change-Id: Ie108d3fdfcc02c81f0eacfca852a1cfc9eea17de
2021-08-28 21:51:45 +02:00
Alin Jerpelea
cb2ecefbf1
arch: xtensa: fix nxstyle errors
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Fix for errors reported by nxstyle tool
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-07 21:21:51 -05:00
Gregory Nutt
1fcced12eb
Xtensa: Timer code now compiles okay
2016-10-23 11:31:48 -06:00
Gregory Nutt
764ef72641
Xtensa: Restore XCHAL_ naming convenction
2016-10-22 09:03:43 -06:00
Gregory Nutt
9e1600b7d3
Xtensa: Trivial interrupt-related changes
2016-10-20 12:56:35 -06:00
Gregory Nutt
5c3afd088e
Xtensa: A little more interrupt handling logic
2016-10-20 11:44:14 -06:00
