Commit Graph

14515 Commits

Author SHA1 Message Date
Peter van der Perk
9e7e45df76 Evaluate n in preprocessor before masking 2022-07-25 23:47:05 +08:00
Peter van der Perk
ec118743ea NX style fixes 2022-07-25 23:47:05 +08:00
Peter van der Perk
eae3f77673 Fix wrong comment style 2022-07-25 23:47:05 +08:00
Peter van der Perk
b3590f00b3 NXStyle and preprocessor fixes
Co-authored-by: Jari van Ewijk <jari.vanewijk@nxp.com>
2022-07-25 23:47:05 +08:00
Jari van Ewijk
dd1096695d Add initial support for NXP S32K3 MCU family
Co-authored-by: Peter van der Perk <peter.vanderperk@nxp.com>
2022-07-25 23:47:05 +08:00
raiden00pl
8eae3bb5ff stm32f0l0g0/stm32_spi.c: fix receiving data for half duplex mode 2022-07-25 23:46:33 +08:00
raiden00pl
351c9dc837 stm32f0l0g0/stm32_spi.c: remove unused spi_readbyte function 2022-07-25 23:46:33 +08:00
raiden00pl
af4d65416a stm32f0l0g0/stm32_spi.c: add missing SPI mode config and fix ifdef 2022-07-25 23:46:33 +08:00
raiden00pl
69986fad84 stm32f0l0g0/hardware/stm32_spi.h: remove unused definitions 2022-07-25 23:46:33 +08:00
raiden00pl
92b676479a stm32l4/Kconfig: add support for STM32L476JG and STM32L476JE 2022-07-23 16:51:31 -03:00
curuvar
c21c7ac8dc Added Adafruit QT Py RP2040 board.
Added ability to configure indivdual UART, SPI and I2C pin location.
2022-07-23 18:25:38 +08:00
curuvar
421b8ae3e7 Ability to use newer pico-sdk with RP2040 builds (Issue #4919) 2022-07-23 14:36:52 +08:00
Fotis Panagiotopoulos
30f8d33bca Fixed path calculation in BBS RAM. 2022-07-22 10:59:57 +08:00
ligd
df365008b2 arm_secure_irq: fix NVIC_IRQ_DBGMONITOR un-secure set failed
NVIC_DEMCR.SDME is a read-only bit

Signed-off-by: ligd <liguiding1@xiaomi.com>
2022-07-22 01:48:55 +03:00
Petro Karashchenko
2291f601ee arch/arm/samv7: fix SPI 16-bit transactions in DMA mode
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-07-21 23:26:20 +08:00
Xiang Xiao
2166c98809 Add printflike and scanflike to all printf/scanf like functions
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-07-18 14:14:36 +03:00
Xiang Xiao
aad5fbd2fb arch: Add up_nputs function to handle the non '\0' string correctly
and change up_puts as a simple macro

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-07-17 17:31:19 +03:00
Michal Lenc
4484d04a8d samv7: add RX DMA support to serial driver
This commit adds RX DMA support to serial driver. The DMA is currently
supported only for USART peripherals, not for UART. It uses two circular
buffers which size can be setup by SAMV7_SERIAL_RXDMA_BUFFER option.

The idle bus interrupt is enabled to ensures data are read even if the
buffer is not yet full. The timeout can be setup by
SAMV7_SERIAL_DMA_TIMEOUT option.

This adds support only for RX transfers.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2022-07-16 15:39:20 +03:00
Michal Lenc
e3e282bd8a samv7: add DMA API for circular buffers
This commit adds functions sam_dmarxsetup_circular() and
sam_dmarxstart_circular() that create API for operating with two or more
circular buffers. This can be used for DMA operation with serial driver
or ADC where ping pong buffers are required to successfully transfer the
data at high speed.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2022-07-16 15:39:20 +03:00
Michal Lenc
89a2b51b96 samv7: add RS-485 mode support to USART driver
This commit enhances SAMV7 serial driver with RS-485 mode available to
USART peripherals. The hardware automatically sets RTS pin high when
data are transfered and low then no transfer occurs. Only USART peripherals
support this mode, UART peripherals do not.

This mode can be enabled by configuration option SAMV7_USARTx_RS485MODE.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2022-07-16 15:39:20 +03:00
raiden00pl
8e5e6ab8cb stm32/Kconfig: stm32_i2s needs SPI_DMA enabled 2022-07-16 11:10:01 +03:00
raiden00pl
a8e7f7742c stm32f0l0g0/Kconfig: set default n for hidden options 2022-07-16 11:10:01 +03:00
raiden00pl
d307e5a7f5 stm32f0l0g0/Kconfig: hide STM32F0L0G0_SPI_DMA option and select it automatically 2022-07-16 11:10:01 +03:00
raiden00pl
1b45982521 stm32f0l0g0/Kconfig: remove the duplicated SPI DMA section 2022-07-16 11:10:01 +03:00
raiden00pl
e39afbf277 stm32/Kconfig: set default n for hidden options 2022-07-16 11:10:01 +03:00
raiden00pl
12273d0aa9 stm32/Kconfig: hide STM32_SPI_DMA option and select it automatically 2022-07-16 11:10:01 +03:00
raiden00pl
1616edbb81 stm32f7/Kconfig: hide STM32F7_SPI_DMA option and select it automatically 2022-07-16 11:10:01 +03:00
raiden00pl
6aef19617b stm32h7/Kconfig: hide STM32H7_SPI_DMA option and select it automatically 2022-07-16 11:10:01 +03:00
raiden00pl
cb94579ab7 stm32wl5/Kconfig: hide STM32WL5_SPI_DMA option and select it automatically 2022-07-16 11:10:01 +03:00
raiden00pl
3c0a3dabfc stm32f0l0g0/SPI: add support for half duplex, simplex rx and simplex tx modes 2022-07-16 02:00:53 +08:00
curuvar
d69d9eb0c9 Added I2C Slave to RP2040
Added length to I2C slave callback.
2022-07-16 01:56:52 +08:00
raiden00pl
2428438037 stm32f0l0g0/SPI: fix compilation for DMA enabled 2022-07-15 11:38:36 -03:00
raiden00pl
c7e6366e91 stm32f0l0g0/SPI: enable SPI for STM32G0 2022-07-15 11:38:36 -03:00
raiden00pl
f702c89c33 stm32f0l0g0/SPI: configure DMA support individually for each SPI 2022-07-15 11:38:36 -03:00
raiden00pl
056e11a3e5 stm32f0l0g0/SPI: only SPI1 and SPI2 are present in STM32 M0 devices 2022-07-15 11:38:36 -03:00
raiden00pl
47e29d9402 stm32f0l0g0: remove references to non-existent ADCs, only ADC1 present on STM32 M0/M0+ devices 2022-07-15 11:36:43 -03:00
Gustavo Henrique Nihei
e24621d545 arch: Convert DEBUGASSERT(false) into more intuitive DEBUGPANIC()
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-07-14 12:08:45 +08:00
Petro Karashchenko
24abf9d5d9 arch/arm/samv7: EMAC bugfixes
1. Fix error recovery mechanism during transmission error
   handling (enable transmission at the end).
2. Fix compilation / operation with CONFIG_SAMV7_EMAC_PREALLOCATE=y
3. Enable fully configured address space for transmission queues
   to allow sending packets with length more than 976 bytes. With
   partially configured address space the AHB error is generated
   during transmission of long packets.

Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-07-12 18:34:37 +08:00
raiden00pl
5c1c18af03 stm32g0: add support for USART3 and USART4 2022-07-10 21:02:23 -03:00
raiden00pl
b179c46178 arch/stm32f0l0g0: add support for stm32l053 2022-07-09 23:37:33 +08:00
Nathan Hartman
849f760b77 Fix various typos 2022-07-08 02:15:54 +08:00
Xiang Xiao
3daa18b661 arch: Remove the unnecessary #if/#endif in assert
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-07-07 19:25:47 +03:00
Xiang Xiao
9ff0971d3f arch: Correct the order of stack related information in assert
forget to update in this patch:
commit b02db04e00
Author: Xiang Xiao <xiaoxiang@xiaomi.com>
Date:   Sun Jun 5 17:10:19 2022 +0800

    arch/assert: Keep the thread dump column order same as ps

    Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-07-07 19:25:47 +03:00
curuvar
aa6ec6518c Added ADC to RP2040 2022-07-07 12:45:28 -03:00
Huang Qi
a4e867b8d4 arch/arm/Kconfig: Add description for ARM_THUMB to make it configurable
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-07-05 19:34:18 +08:00
Xiang Xiao
fcc48c2254 arch/arm: Don't include arch/arch.h in include/irq.h
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-07-04 13:25:56 +03:00
Xiang Xiao
3d1ce144df arch: Move up_getsp from arch.h to irq.h
since all other special register operation in irq.h

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-07-01 10:44:55 -03:00
curuvar
0c3db448bb Added Adafruit Feather RP2040, Adafruit KB2040 and Added neopixel driver to support RP2040 2022-06-30 22:13:49 -07:00
Sergey Nikitenko
4285274c31 New stm32wb chip family 2022-07-01 12:13:58 +08:00
Nathan Hartman
a3688b0c3b tiva: Add UART CTS/RTS support
* arch/arm/src/tiva/common/tiva_lowputc.c
  (tiva_lowsetup):
    For each UART, if Kconfig enables RTS/CTS (e.g.,
    CONFIG_UART0_IFLOWCONTROL and/or CONFIG_UART0_OFLOWCONTROL),
    configure the corresponding GPIO(s).

* arch/arm/src/tiva/common/tiva_serial.c:
  (struct up_dev_s):
    If CONFIG_SERIAL_IFLOWCONTROL, add a bool field 'iflow'. If
    CONFIG_SERIAL_OFLOWCONTROL, add a bool field 'oflow'. This is
    inspired by the implementation for kinetis.
  (g_uart0priv, g_uart1priv, g_uart2priv, g_uart3priv, g_uart4priv,
   g_uart5priv, g_uart6priv, g_uart7priv):
    If Kconfig enables RTS/CTS for a UART (e.g.,
    CONFIG_UART0_IFLOWCONTROL thru CONFIG_UART7_OFLOWCONTROL), set
    the corresponding iflow and/or oflow flag(s).
  (up_setup):
    Check the above-mentioned iflow and oflow flags and set or unset
    the RTSEN and/or CTSEN bits in the UART's CTL register to enable
    the feature.
2022-07-01 11:52:02 +08:00