Commit Graph

52043 Commits

Author SHA1 Message Date
xuxin19
7207e5d1e9 tools/ci:enable arm64 CMake ci build
Signed-off-by: xuxin19 <xuxin19@xiaomi.com>
2023-12-27 07:27:17 -08:00
xuxin19
524425573e CMake:init arm64 CMake qemu-armv8a build
this patch contains arm64 Toolchain, arch common, qemu board and arm64 libc modifications.
support using CMake to compile the qemu executable file.

```
 cmake -B build -DBOARD_CONFIG=qemu-armv8a:nsh -GNinja
 cmake --build build -t menuconfig
 cmake --build build
 qemu-system-aarch64 -cpu cortex-a53 -nographic -machine virt,virtualization=on,gic-version=3 -net none -chardev stdio,id=con,mux=on -serial chardev:con -mon chardev=con,mode=readline -kernel ./nuttx
```
Signed-off-by: xuxin19 <xuxin19@xiaomi.com>
2023-12-27 07:27:17 -08:00
zhanghongyu
e1a1f7b5f4 net/udp: set ipv6 remote addr before udpip_hdrsize
In this case, remote addr is all zero, and the length of the
ip header is not recognized as ipv6_is_ipv4, This will cause
problems in subsequent data filling.

Signed-off-by: zhanghongyu <zhanghongyu@xiaomi.com>
2023-12-27 12:24:59 +01:00
yinshengkai
9852428953 fs: procfs add poll support
Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
2023-12-26 19:23:13 -08:00
yinshengkai
ca99e69c28 fs: update hostfs structure definition
Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
2023-12-26 17:41:12 -08:00
yinshengkai
9b10255088 fs: fix structure layout inconsistency in hostfs
Use the following command to view the structure layout:
pahole nuttx > struct_size.h

Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
2023-12-26 17:41:12 -08:00
Takumi Ando
dde0872b63 fs: smartfs: Add necessary aligned access in smartfs_rename()
smartfs_rename() was stuck on the boards they need
CONFIG_SMARTFS_ALIGNED_ACCESS.

Signed-off-by: Takumi Ando <t-ando@advaly.co.jp>
2023-12-25 23:41:25 -08:00
YAMAMOTO Takashi
992719730f Fix hostfs after uid/gid changes
This fixes a regression in https://github.com/apache/nuttx/pull/10869
2023-12-25 19:40:47 -08:00
zhanghongyu
d50b1778f7 net/local: make the call return of each process consistent with linux
move the accept logic into connect flow.

In order to successfully establish a blocking connection between
the client and server on the same thread.

nonblock is not affected, and the block connect is now the same
as the nonblock flow, other apis are not affected.

Signed-off-by: zhanghongyu <zhanghongyu@xiaomi.com>
2023-12-25 16:53:46 -08:00
yinshengkai
81fccf96db libc/stream: add file out stream
Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
2023-12-25 16:54:16 -03:00
yinshengkai
0c95bf73dc libc/stream: provide lowerout_stream default initialization function
Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
2023-12-25 16:54:16 -03:00
Tiago Medicci Serrano
b58cd6ad34 risc-v/espressif: Update HAL version
This update has no impact on devices. The update aims to update all
HAL-based devices to the same version.
2023-12-24 16:38:06 -08:00
Tiago Medicci Serrano
47e71fc449 esp32s2/rmt: Use the Espressif's common RMT driver.
This commit use the new common RMT driver for all Espressif's
xtensa-based chips on ESP32-S2.
2023-12-24 16:38:06 -08:00
Tiago Medicci Serrano
6234224325 esp32s2: Integrate Espressif HAL repository to ESP32-S2
By integrating the Espressif`s HAL repository into the current
ESP32-S2 implementation on NuttX, it is possible to call functions
that makes it easier to setup the registers of the ESP32-S2,
enabling the usage of common Espressif drivers.
2023-12-24 16:38:06 -08:00
Tiago Medicci Serrano
000bf2a7c7 esp32s3/rmt: Use the Espressif's common RMT driver.
This commit use the new common RMT driver for all Espressif's
xtensa-based chips on ESP32-S3.
2023-12-24 16:38:06 -08:00
Tiago Medicci Serrano
1ca460c89a esp32s3: Fully integrate Espressif HAL repository to ESP32-S3
By integrating the Espressif`s HAL repository into the current
ESP32-S3 implementation on NuttX, it is possible to call functions
that make it easier to set up the registers of the ESP32-S3 and
enables the usage of common Espressif drivers. Please note that
Espressif's HAL repository was already being used for the Wi-Fi
driver. Then, this commit includes other source files to be used
by other drivers other than Wi-Fi and reorganize the build process.
2023-12-24 16:38:06 -08:00
Tiago Medicci Serrano
cb80365daa xtensa/esp/ws2812: Add the lower-half WS2812 driver based on RMT
This lower-half WS2812 LED driver uses the RMT peripheral of the
Espressif's SoCs to drive the RGB addressable LEDs. Compared to
the SPI-based implementation, it is faster!
2023-12-24 16:38:06 -08:00
Tiago Medicci Serrano
69929d4084 xtensa/esp/rmt: Add the lower-half implementation of the RMT driver
The lower-half implementation of the RMT character driver based on
Espressif HAL enables using the RMT peripheral of ESP32, ESP32-S2
and ESP32-S3 as a common xtensa-based Espressif driver.

The RMT packages on Espressif SoCs are 4-byte long and are known as
"items". Please check the Techinal Reference Manual of the chip to
obtain more details.
2023-12-24 16:38:06 -08:00
Tiago Medicci Serrano
d1326e81bc drivers/leds/ws2812: Fix WS2812 pixel size
Although the LED might be RGB-only, the LED data is packed in a
32-bit long variable and, then, this is the default size of a LED
pixel to define the 'WS2812_RW_PIXEL_SIZE' macro. Please note that
the lower-half driver will deal with the case of the addressable
LED being 3 or 4-pixel sized.
2023-12-24 16:38:06 -08:00
Tiago Medicci Serrano
fcff5d43b7 drivers/rmt: Implement an upper-half RMT character driver
The RMT (Remote Control) character driver allows to use the RMT
peripheral (usually, a one-wire peripheral dedicated to driving
IR remote control) as a character driver.

Please note that this perpiheral depends on the lower-half specific
driver implementation.
2023-12-24 16:38:06 -08:00
yf13
dec6ec1138 Update mode.h to add CSR_TVEC 2023-12-23 20:43:47 -08:00
yf13
804f713c86 Update riscv_mmu.h to fix typo in comment
fix typo in comment of mmu_get_region_size function
2023-12-22 18:12:55 -03:00
Eren Terzioglu
c15392d9b7 xtensa/esp32s2: Add xtwdt and rwdt support 2023-12-22 03:59:18 -08:00
Jukka Laitinen
26b7de0f34 fs/fat: Fix number of data clusters usable for fat driver
Fix the issue where fat driver is not using the last two clusters in
the file system.

The fat parameter fs->fs_nclusters is the maximum number of data clusters;
this doesn't include the two in the beginning. Many checks in the fat driver
treat the fs->fs_nclusters-1 as being the last accessible cluster, which is not
right, the last accessible one is actually this number + 2 when the cluster
count includes the two first ones.

Normally this is not an issue when writes are being done through the same
driver, the last two clusters are just never used. But if the filesystem is
modified by external driver, for example with a populated fat created with PC,
or modifying the FS via USB-MSC, this leads to the fat driver not being able to
read anything that uses the last two clusters.

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2023-12-22 11:09:12 +01:00
Tiago Medicci Serrano
daec4cf408 espressif/mcuboot: Fix dependency of the Espressif's port MCUboot.
If the MCUboot (from nuttx-apps) is selected, the Espressif's port
of the MCUboot is not used as the 2nd stage bootloader.
2023-12-22 17:27:58 +08:00
chenwen@espressif.com
2cb14c55f0 xtensa/esp32s3: Support reading encrypted partitions
Signed-off-by: chenwen@espressif.com <chenwen@espressif.com>
2023-12-22 17:27:32 +08:00
Peter van der Perk
0a41d040ac imxrt: flexio guard move lower to allow other drivers to it 2023-12-21 19:20:43 -03:00
xuxin19
274bff234a tool/Config.mk:use bash with or without verbosity enabled
Signed-off-by: xuxin19 <xuxin19@xiaomi.com>
2023-12-21 03:45:52 -08:00
Masayuki Ishikawa
40843b79eb arch: arm64: Fix GICv2 detection
Summary:
- I noticed that qemu-armv8a:netnsh_smp_hv does not detect
  GICv2 on Raspi4B (ubuntu 22.04 server + qemu-8.1.2)
- According to the GIC-400 TRM, it says that the architecture
  version can be obtained from GICC_IIDR (See Table 3-7)
- This commit fixes this issue.

Impact:
- Should be none

Testing:
- Tested with qemu-armv8a:netnsh_smp_hv on
  - Raspi3B+ (ubuntu 22.04 server + qemu-8.1.2)
  - Raspi4B (ubuntu 22.04 server + qemu-8.1.2)
  - M1/MacBook Pro 2021 (macOS 13.6 + qemu-8.1.2)

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2023-12-21 01:21:20 -08:00
liqinhui
41a3c8a5e3 virtio-net:Fix the compile error.
CC:  virtio/virtio-net.c virtio/virtio-net.c: In function 'virtio_net_set_macaddr':
virtio/virtio-net.c:595:17: error: invalid operands to binary % (have 'struct net_driver_s *' and 'int')
  595 |             dev % 256
      |                 ^
make[1]: *** [Makefile:107: virtio-net.o] Error 1
make: *** [tools/LibTargets.mk:101: drivers/libdrivers.a] Error 2
make: *** Waiting for unfinished jobs....

Signed-off-by: liqinhui <liqinhui@xiaomi.com>
2023-12-21 01:21:01 -08:00
chao an
a506f9fb70 Revert "cmake: restore old behavior for savedefconfig"
@raiden00pl I'm surprised why this commit was reverted. It maintains the same functionality as tools/refresh.sh. this change is a good improvement because overwriting the original defconfig to prevent developers from missing out on enabled or disabled features during the development process. If you find any changes in the defconfig after saving it, you should manually restore it, git diff will tell you what has happened. and also this feature prevents more junior developers from forgetting to save their own defconfig

This reverts commit 751bc1528a.

Signed-off-by: chao an <anchao@lixiang.com>
2023-12-20 16:05:19 +01:00
Takumi Ando
6b3aa3b6b9 sensors: mx56xx: Correct type of temperature
The "temp" variable shouldn't be used as both raw
value and compensated.

Signed-off-by: Takumi Ando <t-ando@advaly.co.jp>
2023-12-20 07:00:34 -08:00
Takumi Ando
19ac909eea sensors: mx56xx: Fix calculation of second order compensation
The temperature won't be compensated correctly without this patch.

Signed-off-by: Takumi Ando <t-ando@advaly.co.jp>
2023-12-20 07:00:34 -08:00
Takumi Ando
d9455ab420 sensors: mx56xx: Fix threshold of second order compensation
The threshold of second order compensation at
very low temperature is -15°C.

Signed-off-by: Takumi Ando <t-ando@advaly.co.jp>
2023-12-20 07:00:34 -08:00
Tiago Medicci Serrano
34a6dddb7a boards/esp32s2: Increase init task stack size to 3072
This is done to avoid casual stack overflows.
2023-12-20 06:59:18 -08:00
Jukka Laitinen
ebe961df9e drivers/net/ksz9477: Add simple port-based static VLAN configuration
Add a static port-based VLAN configuration for KSZ9477 switch. This doesn't
use the VLAN tagging, but is a switch's internal mechanism to simply configure
if the packet forwarding is allowed from one port to another.

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2023-12-20 01:30:54 -08:00
chenwen@espressif.com
0810fc45b7 xtensa/esp32s3: Fixed bbpll not calibrated from bootloader issue
1. Solve wifi may not work bug for bbpll not lock or not stable when enable RF.
  2. Improved timing tuning stability on ESP32-S3.
  The root cause of the issue:
	The application won't re-calibrate the BBPLL clock if it's already enabled.
	We add a force-recalib function in the app startup code to make sure even if
	the patch is applied by OTA, the clock is still re-calibrated.

Signed-off-by: chenwen@espressif.com <chenwen@espressif.com>
2023-12-19 22:53:28 -08:00
Takumi Ando
ab693b9bec sensors: mx56xx: Add support for second order compensation
In order to obtain best accuracy over temperature range,
particularly in low temperature, it is recommended to
compensate the non-linearity over the temperature.

ref: ENG_DS_MS5611-01BA03_B3.pdf
     ENG_DS_MS5607-02BA03_B4.pdf

Signed-off-by: Takumi Ando <t-ando@advaly.co.jp>
2023-12-19 03:36:19 -08:00
xuxin19
1c9fab65d8 Revert "testlist: Disable sim:matter ci temporarily"
restart sim:matter ci

This reverts commit 17458c7dba.
2023-12-18 20:38:10 -08:00
xuxin19
87553e71f8 cmake build file support with libcxx 17.0.6
Signed-off-by: xuxin19 <xuxin19@xiaomi.com>
2023-12-18 20:38:10 -08:00
chao an
b67c9e6ca7 syslog/ramlog: improve ramlog performance
replace char copy to memcpy to improve the performance

Signed-off-by: chao an <anchao@lixiang.com>
2023-12-18 20:38:00 -08:00
Xiang Xiao
31a6ffa15c arm/sama5: Fix error: array subscript 0 is outside array bounds
chip/sam_emaca.c: In function 'sam_emac_interrupt':
Error: /github/workspace/sources/nuttx/arch/arm/src/common/arm_internal.h:140:25: error: array subscript 0 is outside array bounds of 'volatile uint32_t[0]' {aka 'volatile long unsigned int[]'} [-Werror=array-bounds=]
  140 | #define getreg32(a)    (*(volatile uint32_t *)(a))
      |                        ~^~~~~~~~~~~~~~~~~~~~~~~~~~
chip/sam_emaca.c:364:37: note: in expansion of macro 'getreg32'
  364 | #  define sam_getreg(priv,addr)     getreg32(addr)
      |                                     ^~~~~~~~
chip/sam_emaca.c:1630:9: note: in expansion of macro 'sam_getreg'
 1630 |   tsr = sam_getreg(priv, SAM_EMAC_TSR_OFFSET);
      |         ^~~~~~~~~~

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-12-19 08:36:49 +08:00
Xiang Xiao
d54c79126a am335x_lcdc: Fix error: array subscript 0 is outside array bounds of 'volatile uint32_t[0]'
Error: /github/workspace/sources/nuttx/arch/arm/src/common/arm_internal.h:141:51: error: array subscript 0 is outside array bounds of 'volatile uint32_t[0]' {aka 'volatile long unsigned int[]'} [-Werror=array-bounds=]
  141 | #define putreg32(v,a)  (*(volatile uint32_t *)(a) = (v))
      |                        ~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~
chip/am335x_lcdc.c:387:3: note: in expansion of macro 'putreg32'
  387 |   putreg32(AM335X_CM_WKUP_CLKMODE_DPLL_DISP, 0x4);
      |   ^~~~~~~~
In function 'am335x_lcd_initialize':
cc1: note: source object is likely at address zero
In function 'am335x_set_refclk',
    inlined from 'am335x_lcd_initialize' at chip/am335x_lcdc.c:607:9:
Error: /github/workspace/sources/nuttx/arch/arm/src/common/arm_internal.h:141:51: error: array subscript 0 is outside array bounds of 'volatile uint32_t[0]' {aka 'volatile long unsigned int[]'} [-Werror=array-bounds=]
  141 | #define putreg32(v,a)  (*(volatile uint32_t *)(a) = (v))
      |                        ~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~
chip/am335x_lcdc.c:430:3: note: in expansion of macro 'putreg32'
  430 |   putreg32(AM335X_CM_WKUP_CLKMODE_DPLL_DISP, 0x7);
      |   ^~~~~~~~
In function 'am335x_lcd_initialize':
cc1: note: source object is likely at address zero
Error: /github/workspace/sources/nuttx/arch/arm/src/common/arm_internal.h:141:25: error: array subscript 0 is outside array bounds of 'volatile uint32_t[0]' {aka 'volatile long unsigned int[]'} [-Werror=array-bounds=]
  141 | #define putreg32(v,a)  (*(volatile uint32_t *)(a) = (v))
      |                         ^~~~~~~~~~~~~~~~~~~~~~~~~
chip/am335x_lcdc.c:780:3: note: in expansion of macro 'putreg32'
  780 |   putreg32(AM335X_LCD_CLKC_ENABLE,
      |   ^~~~~~~~
cc1: note: source object is likely at address zero
Error: /github/workspace/sources/nuttx/arch/arm/src/common/arm_internal.h:141:25: error: array subscript 0 is outside array bounds of 'volatile uint32_t[0]' {aka 'volatile long unsigned int[]'} [-Werror=array-bounds=]
  141 | #define putreg32(v,a)  (*(volatile uint32_t *)(a) = (v))
      |                         ^~~~~~~~~~~~~~~~~~~~~~~~~
chip/am335x_lcdc.c:784:3: note: in expansion of macro 'putreg32'
  784 |   putreg32(AM335X_LCD_CLKC_RESET, LCD_CLKC_RESET_MAIN);
      |   ^~~~~~~~
cc1: note: source object is likely at address zero
Error: /github/workspace/sources/nuttx/arch/arm/src/common/arm_internal.h:141:25: error: array subscript 0 is outside array bounds of 'volatile uint32_t[0]' {aka 'volatile long unsigned int[]'} [-Werror=array-bounds=]
  141 | #define putreg32(v,a)  (*(volatile uint32_t *)(a) = (v))
      |                         ^~~~~~~~~~~~~~~~~~~~~~~~~
chip/am335x_lcdc.c:790:3: note: in expansion of macro 'putreg32'
  790 |   putreg32(AM335X_LCD_IRQ_EN_SET, regval);
      |   ^~~~~~~~
cc1: note: source object is likely at address zero
Error: /github/workspace/sources/nuttx/arch/arm/src/common/arm_internal.h:141:25: error: array subscript 0 is outside array bounds of 'volatile uint32_t[0]' {aka 'volatile long unsigned int[]'} [-Werror=array-bounds=]
  141 | #define putreg32(v,a)  (*(volatile uint32_t *)(a) = (v))
      |                         ^~~~~~~~~~~~~~~~~~~~~~~~~
chip/am335x_lcdc.c:796:3: note: in expansion of macro 'putreg32'
  796 |   putreg32(AM335X_LCD_SYSC, LCD_SYSC_IDLE_SMART | LCD_SYSC_STANDBY_SMART);
      |   ^~~~~~~~

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-12-19 08:36:49 +08:00
Xiang Xiao
0d0867484a modem/alt1250: Fix 'inst' may be used uninitialized
In function 'unlock_evtbufinst',
    inlined from 'parse_altcompkt' at modem/alt1250/alt1250.c:919:7,
    inlined from 'altcom_recvthread' at modem/alt1250/alt1250.c:968:21:
Error: modem/alt1250/alt1250.c:385:3: error: 'inst' may be used uninitialized [-Werror=maybe-uninitialized]
  385 |   nxmutex_unlock(&inst->stat_lock);
      |   ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
modem/alt1250/alt1250.c: In function 'altcom_recvthread':
modem/alt1250/alt1250.c:822:26: note: 'inst' was declared here
  822 |   FAR alt_evtbuf_inst_t *inst;
      |                          ^~~~

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-12-19 08:36:49 +08:00
Xiang Xiao
e42780bb0f arch/arm: Disable -Warray-bound for rp2040, dm320 and lpc31xx
since gcc report the false alarm if the pointer offset from zero address:
    inlined from 'up_vectormapping' at chip/dm320_boot.c:162:7,
    inlined from 'arm_boot' at chip/dm320_boot.c:211:3:
Error: chip/dm320_boot.c:117:17: error: array subscript 0 is outside array bounds of 'uint32_t[0]' {aka 'long unsigned int[]'} [-Werror=array-bounds=]
  117 |   ctable[index] = (paddr | mmuflags);
      |   ~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-12-19 08:36:49 +08:00
Xiang Xiao
1e696425fd lpc43xx/usb: Fix gcc13.2 compiler error
Error: arch/arm/src/common/arm_internal.h:140:25: error: array subscript 0 is outside array bounds of 'volatile uint32_t[0]' {aka 'volatile long unsigned int[]'} [-Werror=array-bounds=]
  140 | #define getreg32(a)    (*(volatile uint32_t *)(a))
      |                        ~^~~~~~~~~~~~~~~~~~~~~~~~~~
chip/lpc43_usb0dev.c:347:34: note: in expansion of macro 'getreg32'
  347 | #  define lpc43_getreg(addr)     getreg32(addr)
      |                                  ^~~~~~~~
chip/lpc43_usb0dev.c:2605:15: note: in expansion of macro 'lpc43_getreg'
 2605 |   return (int)lpc43_getreg(LPC43_USBDEV_FRINDEX_OFFSET);
      |               ^~~~~~~~~~~~

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-12-19 08:36:49 +08:00
Xiang Xiao
d267071398 stm32f4discovery/cxxtest: Fix gcc13.2 compiler error
arm-none-eabi-ld: /tools/gcc-arm-none-eabi/bin/../lib/gcc/arm-none-eabi/13.2.1/../../../../arm-none-eabi/lib/thumb/v7e-m/nofp/libsupc++.a(eh_alloc.o): in function `_GLOBAL__sub_I__ZN9__gnu_cxx9__freeresEv':
eh_alloc.cc:(.text.startup._GLOBAL__sub_I__ZN9__gnu_cxx9__freeresEv+0x12): undefined reference to `getenv'

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-12-19 08:36:49 +08:00
Eren Terzioglu
9473267620 risc-v/esp32c6: Add ostest defconfig 2023-12-18 11:10:53 -08:00
jianglianfang
2a92748c42 drivers/goldfish_fb: optimize goldfish fb register
The Goldfish FB register should be optimized by considering the need to pass in parameters for base and irq.

Signed-off-by: jianglianfang <jianglianfang@xiaomi.com>
2023-12-18 09:08:32 -08:00
jianglianfang
f4c8a17837 sim_lcd: add open & close
The opening and closing of the window has been associated with the opening and closing of fb, but the LCD has not yet been optimized. The window will only open when sim_x11openwindow is called, and similarly, the window will only close when sim_x11closewindow is called.

Signed-off-by: jianglianfang <jianglianfang@xiaomi.com>
2023-12-18 09:06:29 -08:00