Commit Graph

15164 Commits

Author SHA1 Message Date
David Sidrane
7e171da63f stm32wl5:pinmap Fix typo 2023-04-19 09:58:11 +02:00
zhangyuan21
c00498c164 arch/arm: update running task when context switch occurred
The text describes an issue related to the running task in code.
The running task is only used when calling the _assert function
to indicate the task that was running before an exception occurred.
However, the current code only updates the running task during
irq_dispatch, which is suitable for ARM-M architecture but not
for ARM-A or ARM-R architecture, because their context switches
are not done through irq handler. Therefore, if the following
process is followed, the value of the running task will be incorrect:

1. task1 is running, this_task()=task1
2. do_irq is executed, setting running task()=task1
3. task1 switches to task2
4. task2 is running and generates a data abort
5. In the data abort, the _assert function is called,
   and the running task obtained is still task1, but
   the actual task that generated the exception is task2.

Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2023-04-19 10:14:05 +09:00
raiden00pl
642358e68f stm32h7/rcc: make VOS0 configurable from board.h also for stm32h7x7xx
Over-drive can be forced to a given state by adding define to the
board.h configuration file:

   #define STM32_VOS_OVERDRIVE 1 - force over-drive enabled,
   #define STM32_VOS_OVERDRIVE 0 - force over-drive disabled,
   #undef STM32_VOS_OVERDRIVE    - autoselect over-drive by the default RCC logic
2023-04-17 04:23:40 -04:00
raiden00pl
876b7a5e8e stm32h7/rcc: make VOS0 configurable from board.h
It seems that over-drive is not required for ULPI but it can be a workaround solution for boards with poor signal integration.
Higher core voltage means faster clock signal edges, which may be sufficient to synchronize the high-speed clock and data on poorly designed boards.

Over-drive can be forced to a given state by adding define to the
board.h configuration file:

   #define STM32_VOS_OVERDRIVE 1 - force over-drive enabled,
   #define STM32_VOS_OVERDRIVE 0 - force over-drive disabled,
   #undef STM32_VOS_OVERDRIVE    - autoselect over-drive by the default RCC logic
2023-04-17 04:23:40 -04:00
Ville Juven
b982c1747b sched/addrenv: Miscellaneous clean-up and fixes
- Remove the temporary "saved" variable when temporarily changing MMU
  mappings to access another process's memory. The fact that it has an
  address environment is enough to make the choice
- Restore nxflat_addrenv_restore-macro. It was accidentally lost when
  the address environment handling was re-factored.
2023-04-15 13:21:48 +09:00
zhangyuan21
024b13f3ed arch/arm: enable eoimode only select CONFIG_XXX_GIC_EOIMODE
On a GICv2 implementation, setting GICC_CTLR.EOImode to 1 separates
the priority drop and interrupt deactivation operations.

Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2023-04-11 08:54:45 +02:00
zhangyuan21
c239d19df0 nuttx: add more dependent header file
Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2023-04-11 09:13:32 +03:00
wangming9
a7fc26124d arch/arm64: the arm64 perf interface supports pmu
Summary:
- Support arm64 pmu api, Currently only the cycle counter function is supported.
- Using ARM64 PMU hardware capability to implement perf interface, modify all
  perf interface related code.
- Support for pmu init under smp.

Signed-off-by: wangming9 <wangming9@xiaomi.com>
2023-04-10 16:23:49 -03:00
raiden00pl
5e5fcd8076 fix copy-paste errors for d356ad633f 2023-04-10 03:21:36 -07:00
Petro Karashchenko
665a8e5b93 arch/arm/samv7: fix operation of TC8 and TC11
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2023-04-07 12:28:45 -03:00
Petro Karashchenko
4f3faded71 arch/arm/samv7: fix comment in freerun timer
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2023-04-07 12:28:45 -03:00
raiden00pl
d356ad633f {stm32,stm32f7,stm32h7,stm32l4,efm32}/otg: rasie an assertion if IN request is not possible to transfer
Otherwise, a request will never be transferred and there is no
information to the user that something is wrong.
For example, when using default values for TXFIFO in HS mode,
USBMSC will never work because the maximum request len is 512B
which is lower than the default TXFIFO size for IN EP.
2023-04-06 19:30:53 +03:00
raiden00pl
62ff3f484e {stm32f7,stm32h7,stm32l4}/sdmmc: callback support requires HPWORK 2023-04-06 18:10:59 +03:00
raiden00pl
1ace09cf10 stm32h7/otgdev: FS transceiver must be enabled if OTGFS enabled 2023-04-05 13:34:09 -03:00
raiden00pl
83cdaeb593 stm32h7/otg: add support for external ULPI 2023-04-04 09:25:00 -07:00
raiden00pl
f89d2be99f stm32h7/rcc: OTGHS ULPI works only in VOS0
This is not documented by ST at all but otherwise ULPI is dead.
2023-04-04 09:25:00 -07:00
raiden00pl
d76b7c20ad stm32h7: update ULPI pins 2023-04-04 09:25:00 -07:00
yinshengkai
cafd3af160 arch/boards: fix stm32f411-mininum:nsh compilation failure after enabling IRQMONITOR 2023-04-03 09:05:21 +02:00
raiden00pl
71d7028c4a stm32h7/stm32_sdmmc.c: fix compilation 2023-04-02 17:20:17 -04:00
Huang Qi
7f27129896 tools: Move Rust relative settings to Rust.defs
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2023-04-01 16:45:11 +03:00
GD32-MCU
6a799fef6c add littlefs support for gd32f450zk-eval board 2023-04-01 10:38:16 -03:00
raiden00pl
9bd865301c nrf52: add usb support 2023-03-30 09:28:55 -03:00
Huang Qi
536739d2da tools: Export LLVM style arch info for non-c language
Current Toolchain.defs set the compile flags directly, it's OK for
target specified gcc toolchain.

But some LLVM based toolchains (Rust/Zig etc) use single toolchain to handle all supported paltform.

In this patch, arch level Toolchain.defs export standard LLVM style arch flags, and let <Lang>.defs to map them into internal style,

This will simplify the intergration of non-c language.

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2023-03-29 09:26:38 -03:00
raiden00pl
d23759d457 arch/nrf53: add tickless support 2023-03-28 19:43:35 -03:00
raiden00pl
f9f41bbd95 arch/nrf53: add RTC support 2023-03-28 19:43:35 -03:00
raiden00pl
bcecf2023f arch/nrf53: add GPIOTE support 2023-03-28 19:43:19 -03:00
raiden00pl
74b0e8c2c8 arch/nrf53: rename nrf53_gpioe.h to nrf53_gpiote.h 2023-03-28 19:43:19 -03:00
Petro Karashchenko
6c6a54b0c9 ld: fix warning reported by GCC 12 linker
warning: nuttx has a LOAD segment with RWX permissions

Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2023-03-27 12:38:28 +08:00
chao an
0eae218b49 arm/chip/sdio/muxbus: comment all undefined symbols
comment all undefined symbols to avoid build break if CONFIG_SDIO_MUXBUS enabled

Signed-off-by: chao an <anchao@xiaomi.com>
2023-03-26 13:04:48 -03:00
Lwazi Dube
21ffb4de72 boards/sama5d3-xplained: Make hot plugging more reliable. 2023-03-26 13:03:21 -03:00
raiden00pl
2ddc96ff66 arch/stm32/stm32.h: do not include stm32_usbdev.h if not supported 2023-03-25 23:41:32 -07:00
raiden00pl
68f6fb2edd {stm32,stm32l4,stm32f0l0g0}/otg: move STM32_NENDPOINTS definitions to header files
This value is useful for users when initializing a USB composite device in a board-specific logic
2023-03-25 23:41:32 -07:00
raiden00pl
2c97c76577 nrf53_clockconfig.c: add comment about oscillator configuration 2023-03-25 22:24:36 +02:00
raiden00pl
1d4d008564 nrf53: UART1 available only on the app core 2023-03-25 22:24:36 +02:00
raiden00pl
bca927e203 nrf52/nrf53/sdc: define BLE max connection if NET_BLUETOOTH=n 2023-03-25 22:24:36 +02:00
raiden00pl
620c6cfd58 nrf52/nrf53: lowputc: fix compilation if flow control enabled 2023-03-25 22:24:36 +02:00
raiden00pl
3571ff3c54 arch/nrf53: add SAADC support 2023-03-25 18:37:51 +02:00
liuxuanfu
87852e8cbe arch/arm/src/stm32/hardware: Fix register define 2023-03-24 14:55:09 -03:00
liuxuanfu
945e4c6d81 arch/arm/src/stm32/hardware: Add stm32g4 rcc apb1 timer enable compatibility 2023-03-24 14:55:09 -03:00
raiden00pl
a1aecd7369 {stm32/stm32l4/stm32f7/stm32h7/efm32}/otgdev: remove invalid use of the priv field for EP
This field is for use in the class driver, not in the controller logic
2023-03-24 09:13:05 -07:00
raiden00pl
13a96c7eb7 {stm32f7,stm32h7}/otg: fix compilation for USBDEV when USB_DEBUG=y 2023-03-24 08:16:06 -07:00
Matthias Grob
d1113110f3 armv7-m irq: avoid uninitialized warning/error
arm-none-eabi-gcc 12.2.0 gives the following warnings:
error: 'primask' is used uninitialized
error: 'primask' may be used uninitialized

We use Werror and the file is indirectly included in different
places. I suggest telling the compiler to ignore these warnings
since primask is initialized on the first assembly line.

This is the only problem I encountered so far when upgrading the compiler.
2023-03-23 04:02:43 -07:00
SPRESENSE
e317af0a84 arch: cxd56xx: Fix SPI transfer without DMA
SPI transfers are dynamically determined to use DMA or not.
The flag to judge is removed in a previous simple refactoring commit.
Revert the logic and fix an issue that SPI transfer fails.
2023-03-23 08:34:29 +01:00
jturnsek
1d7383d4a1 imxrt_flexpwm independent output B support added 2023-03-21 21:03:39 +02:00
Lwazi Dube
84a3ddd79b boards/sama5d3-xplained: Fix OHCI clock.
Choose a divider value that matches the description provided within
the same header file.
Include stddef.h to fix compiler errors because NULL is not defined.
Make logs print protocol, vid and pid consistently, (decimal hex hex).
2023-03-21 14:08:03 -03:00
ligd
bb281eedfa cache: add up_get_xcache_linesize() support
Signed-off-by: ligd <liguiding1@xiaomi.com>
2023-03-20 17:17:22 +08:00
Lwazi Dube
f5575b1b85 boards/sama5d3-xplained: Add reboot support.
The peripheral reset flag was added to speed up the reboot.
Rebooting takes too long (15 seconds) if this flag is not set.
2023-03-20 09:13:37 +01:00
zhangyuan21
cf56e4113a arch: remove unnecessary sem_setprotocol code
Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2023-03-17 16:53:19 -03:00
raiden00pl
0976cddd03 arch/nrf52/nrf52_tickless_rtc.c: fix tickless operations - ostest fail without this change 2023-03-15 22:34:07 +01:00
raiden00pl
33b19e967c arch/nrf52/nrf52_tickless_rtc.c: check configuration 2023-03-15 22:34:07 +01:00