Simplify the clock mode from the board.h -files. Also make the
SD clock definable as well.
Co-authored-by: Petro Karashchenko <petro.karashchenko@gmail.com>
Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
Some related products, such as Aries m100pfs, don't support eMMC
speeds up to 200MHz. Thus, provide option to select slower clock.
This has only to do with the clocking, no CMD6 is sent to select
high speed modes.
Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
The L3 mapping function was just way too simplistic. Depending on memory
configuration it either works or not.
Noticed that with icicle:pnsh the software crashes due to instruction
page fault, reason is the map_region() implementation that does not
work for regions that are not aligned to 2MB (the L2 page size).
Implemented an extremely simplistic page table allocator for the L3
references, that should once and for all get rid of the L3 mapping issue.
NOTE: gran_alloc() cannot be used at this point, it is too early for it.
since we can query this value by MTDIOC_ERASESTATE after:
commit 30cb497fe1
Author: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
Date: Tue Jul 13 19:33:12 2021 -0300
mtd: Add MTDIOC_ERASESTATE command for retrieving erase state value
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
reason:
1. g_running_tasks = thread A
2. thread A exit (free thread A's tcb) -> thread B
3. thread B interrupt by irq
4. check g_running_tasks->flags -> kasan report used after free
rootcause:
g_running_tasks has't set completely when syscall hanppened
Resolve:
Use rtcb (get at ISR begining) instead
Signed-off-by: ligd <liguiding1@xiaomi.com>
If the system starts up using the SD-card, and later wants
to switch to use the eMMC, it's not going to happen. SD-card
will be kept selected within the FPGA making the transition
fail.
It's been possible to switch from eMMC to SD, but now the
transition is possible for both directions.
Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
Seperate usrsock device driver with usrsock core function layer
to make it more flexiable to adopt other kind of usrsock interface driver
Signed-off-by: liangchaozhong <liangchaozhong@xiaomi.com>
Modify the file according to the checks
update the board config files, and modify the gd32f4xx_progmem.c
Add chip GD32F450 of GD32MCU
delete the micro FAR, modify code style
Add chip GD32F450 of GD32MCU
Issuing the following commands doesn't succeed:
- conn
- disconn
- conn
This USB driver doesn't even disconnect without this patch.
If the USB driver has been started from another hart, closing it
will not disable the PLIC interrupt. This means it's possible many
harts get the USB interrupt and thus make the USB look very unstable.
Fix these problems by disconnecting the USB via the USB_POWER
register at shutdown and disabling the interrupt at shutdown. Also
clear the software internals via the mpfs_sw_setup() for the conn /
disconect loop to succeed.
Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
in struct work_s:
union
{
struct
{
struct dq_entry_s dq; /* Implements a double linked list */
clock_t qtime; /* Time work queued */
} s;
struct wdog_s timer; /* Delay expiry timer */
}
while we use WDOG_ISACTIVE(&work->timer) to decide use dq or timer,
that is error, wd_cancel() maybe modify this area, dq_rem() also can
modify this area.
So we can't use the WDOG_ISACTIVE(&work->timer) to take as the judgement,
when there is a union.
Fix:
swap the order in struct wdog_s, move the arg to the second 32bit
Signed-off-by: ligd <liguiding1@xiaomi.com>
