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8d4681a190
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52 Commits

Author SHA1 Message Date
p-szafonimateusz
8d4681a190 arch/intel64: add support for AP cores boot 
Intel64 can now boot application cores which is needed for SMP

IMPORTANT: CONFIG_BOARD_LOOPSPERMSEC must be properly configured,
otherwise AP boot sequence can fail due too short delays during the AP startup

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
 2024-06-29 22:37:48 +08:00
p-szafonimateusz
961ade88fe arch/intel64: add support for inter-processor signaling 
Add support for inter-processor signaling in x86_64 based on up_trigger_irq() interface.
Preparations for SMP.

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
 2024-06-29 12:57:37 +08:00
p-szafonimateusz
c6170286ca arch/intel64: add cpu specific data and per-cpu interrupt stacks 
Use GS base regsiter to store reference to CPU private data.
Then we can easily refer to private CPU data using the GS segment.

Required for SMP support.

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
 2024-06-28 09:40:32 -03:00
p-szafonimateusz
530f5cd324 arch/intel64: add cache support 
Add dcache and icache support for intel64

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
 2024-04-22 23:13:44 +02:00
p-szafonimateusz
30226901c0 arch/x86_64: add simple ACPI parser 
add simple ACPI parser for intel64.

For now RSDP signature can be found in BIOS legacy region or can be provided by multiboot2

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
 2024-04-22 23:47:09 +08:00
p-szafonimateusz
0aac7d929d intel64/arch.h: fix ist_t structure, there is no reserved5 field 
Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
 2024-04-22 23:46:10 +08:00
p-szafonimateusz
b1fd3da0f6 intel64/intel64_irq.c: support interrupts up to 255 
From now all intel64 interrupts are supported.
Required step towards MSI/MSI-X

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
 2024-03-08 20:18:39 -03:00
Yanfeng Liu
a66c7c3ee1 comments/docs: fix typos in comments 
This fix some typos in comments.

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
 2024-03-06 13:31:50 +08:00
p-szafonimateusz
d4b17f963d arch/intel64: add HPET timer support as oneshot timer 
Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
 2024-03-03 02:24:40 +08:00
p-szafonimateusz
cdfce8a055 arch/x86_64: add spinlock support 
Add spinlock support for x86_64, needed for SMP

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
 2024-02-27 10:27:34 -03:00
p-szafonimateusz
3a3341ba0e arch/intel64: enable FPU and implement up_fpucmp to pass ostest 
enable FPU and implement up_fpucmp to pass ostest

With aggressive optimization enabled (-O2/-O3), ostest FPU test will fail.
This is because the compiler will generate additional vector
instructions between subsequent up_fpucmp() calls (loop vectorization
somewhere in usleep() call), which will consequently overwrite
the expected FPU context (XMM registers).

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
 2024-02-26 18:17:37 -03:00
p-szafonimateusz
b14c3e1e2e arch/intel64: add software reset support 
This adds a software reset for intel64, enables the use of
the reboot command from NSH
 2024-02-26 23:55:14 +08:00
p-szafonimateusz
8c4612be50 arch/intel64: add g_ prefix to global data 
to follow NuttX coding standard

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
 2024-02-23 18:16:10 -08:00
raiden00pl
5b87fdfb9d Documentation: remove all migrated READMEs 2023-10-29 21:03:54 -03:00
Xiang Xiao
7990f90915 Indent the define statement by two spaces 
follow the code style convention

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2023-05-21 09:52:08 -03:00
Xiang Xiao
7a8cf7ff70 Indent the include statement by two spaces 
follow the coding style

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2023-05-16 12:34:32 -03:00
Fotis Panagiotopoulos
85ceb7920e Typo fixes. 2023-02-17 11:17:11 -03:00
Xiang Xiao
fcc48c2254 arch/arm: Don't include arch/arch.h in include/irq.h 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-07-04 13:25:56 +03:00
Xiang Xiao
3d1ce144df arch: Move up_getsp from arch.h to irq.h 
since all other special register operation in irq.h

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-07-01 10:44:55 -03:00
Xiang Xiao
11e1a8b28b arch: Define WCHAR_[MIN|MAX] in arch/include/limits.h 
follow up the below change:
commit 6357523892
Author: Xiang Xiao <xiaoxiang@xiaomi.com>
Date:   Mon Nov 1 12:40:51 2021 +0800

    arch: Add _wchar_t typedef like other basic types

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-06-03 22:25:49 +03:00
chao.an
3f65b562bb arch: inline up_interrupt_context() 
inline the up_interrupt_context() to avoid unnecessary stack pushes

Signed-off-by: chao.an <anchao@xiaomi.com>
 2022-05-26 04:36:07 +08:00
Xiang Xiao
0c7517e579 arch: Remove the duplicated syscall.h in each arch 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-02-27 22:54:13 +08:00
Xiang Xiao
1d1bdd85a3 Remove the double blank line from source files 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-02-20 20:10:14 +01:00
Petro Karashchenko
3e76c3266e assert: unify stack and register dump across platforms 
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
 2021-12-20 00:02:12 -03:00
Xiang Xiao
6357523892 arch: Add _wchar_t typedef like other basic types 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-12-09 16:57:23 +09:00
anjiahao
9d6c92f0fa arch:move debug.h form headfile to c file 
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
 2021-12-07 04:01:27 -08:00
Xiang Xiao
a0990ee416 arch: Remove the duplicated up_tls_info implementation 
Define up_tls_info in arch/arch.h directly if the general one isn't suitable

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-12-05 20:59:53 -06:00
Xiang Xiao
b3f9ffbe72 Replace all __attribute__((aligned(x)) with aligned_data(x) 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-07-29 21:55:21 -03:00
Xiang Xiao
6576306bca arch: Rename xxx_getsp to up_getsp 
All modern desgin support stack pointer and it's also an
important information, so let's standardize this interface.

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-06-09 10:20:02 -07:00
Xiang Xiao
001e7c3e76 sched: Don't include nuttx/sched.h inside sched.h 
But let nuttx/sched.h include sched.h instead to
avoid expose nuttx kernel API to userspace.

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-05-24 12:11:53 +09:00
Juha Niskanen
abcb67a292 Remove final remaining CONFIG_DISABLE_SIGNALS and CONFIG_DISABLE_SIGNAL 2021-05-10 17:04:38 -03:00
Alin Jerpelea
2c4e9e7664 arch: x86_64: fix Mixed Case errors 
Fix for Mixed Case errors reported by nxstyle tool

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-04-07 10:48:26 -05:00
Alin Jerpelea
72fb895d41 arch: x86_64: fix nxstyle errors 
Fix for errors reported by nxstyle tool

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-04-07 10:48:26 -05:00
Gustavo Henrique Nihei
330eff36d7 sourcefiles: Fix relative path in file header 2021-03-09 23:18:28 +08:00
Xiang Xiao
0dc6990166 Fix nxstyle warning 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-01-13 08:57:58 +01:00
Xiang Xiao
0536953ded Kernel module should prefer functions with nx/kmm prefix 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-01-13 08:57:58 +01:00
YAMAMOTO Takashi
510014363e arch/x86_64/include/intel64/inttypes.h: Fix xxxPTR definitions 2020-11-22 01:46:42 -08:00
YAMAMOTO Takashi
c3ff79a87c Remove unused _intptr_t and _uintptr_t 2020-11-22 01:46:42 -08:00
YAMAMOTO Takashi
a462644e32 intel64: Add _intmax_t and _uintmax_t 2020-11-19 00:49:56 -08:00
YAMAMOTO Takashi
7eef194a93 intel64: Switch int64_t from long long to long 
To make it match what the compiler expects.

on nuttx-ci-linux image:
    root@fec5a6192c70:/tools# gcc -dM -E - < /dev/null | grep -E "UINT(32|64)_TYPE"
    #define __UINT64_TYPE__ long unsigned int
    #define __UINT32_TYPE__ unsigned int
    root@fec5a6192c70:/tools#

on macOS:
    spacetanuki% x86_64-elf-gcc -dM -E - < /dev/null | grep -E "UINT(32|64)_TYPE"
    #define __UINT32_TYPE__ unsigned int
    #define __UINT64_TYPE__ long unsigned int
    spacetanuki%
 2020-11-19 00:49:56 -08:00
YAMAMOTO Takashi
4b382c6bab intel64 inttypes.h: Remove PRI/SCN macros for fast and least types 2020-11-05 18:49:22 -08:00
Xiang Xiao
db02cea58c arch/x86_64: Change up_getrsp to x64_getsp 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2020-07-09 13:51:09 +01:00
Xiang Xiao
4fbbd2e3bf arch: Move PRIxMAX and SCNxMAX definition to include/stdint.h 
like other related macro(e.g. INTMAX_MIN, INTMAX_MAX...)

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I8863599960b1a9b1c22ae9c35735a379a4c745b0
 2020-06-10 08:24:47 +02:00
Xiang Xiao
7758eb8658 arch: Define INTx_C and UINTx_C macro 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: Ia50ea8764880fabd3d878c95328632c761be6b43
 2020-06-10 08:24:47 +02:00
Gregory Nutt
c2244a2382 Remove CONFIG_TLS 
A first step in implementing the user-space error is force TLS to be enabled at all times.  It is no longer optional
 2020-05-07 12:04:16 -06:00
Ouss4
a4dd967440 arch/: Implement up_tls_info() for the rest of the architectures. 2020-05-06 21:56:40 -06:00
Yang Chung-Fan
8b86fae8d3 arch: x86_64: Check only XSAVE and rename __eanble_sse3 to __enable_sse_avx 2020-05-05 02:03:34 -07:00
Yang Chung-Fan
2936f72651 arch: x86_64: revoke lower 128MB mapping later, ldmxcsr require 32-bit address 2020-05-05 02:03:34 -07:00
Brennan Ashton
aea90e7cf0 Clean code to match nxstyle requirements 
Signed-off-by: Brennan Ashton <bashton@brennanashton.com>
 2020-05-04 08:32:22 -06:00
Brennan Ashton
a9871f584a Resolve linking issues with x86_64 port 
Signed-off-by: Brennan Ashton <bashton@brennanashton.com>
 2020-05-04 08:32:22 -06:00