Michal Lenc
03e5c0217b
samv7: allow usage of QSPI in SPI mode for all MCUs
...
Current implementation of QSPI in SPI mode was available only for MCUs
that do not have standard SPI at all. MCUs with both QSPI and SPI can
however also use QSPI in SPI mode and thus have one more SPI bus. This
commit adds required defines and config options to support QSPI in SPI
mode for all SAMv7 MCUs.
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2023-08-28 17:39:51 +03:00
Michal Lenc
a64903acc7
samv7: adds support for QSPI driver in SPI Mode
...
This commit adds new files that support functionality of QSPI driver in
SPI Master Mode. This functionality is included in new files sam_qspi_spi.x
to avoid too much mess in the source code. QSPI in SPI mode can be turn
on by config option SAMV7_QSPI_SPI_MODE.
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2021-10-30 01:24:31 -05:00
Alin Jerpelea
c39339a7a8
arch: arm: include: nxstyle fixes
...
nxstyle fixes to pass CI
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-22 19:28:38 -07:00
Alin Jerpelea
4daa276903
arch: arm: include: Author Gregory Nutt: update licenses to Apache
...
Gregory Nutt has submitted the SGA and we can migrate the licenses
to Apache.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-22 19:28:38 -07:00
Dave Marples
d0cda60442
In the current implementation we only use very high priority interrupts (levels 0, 0x10 and 0x20 in CORTEX-M speak) but that means there are loads of lower priority ones that are effectively unused. I have *not* changed the semantics of these levels but have 'shifted' them to be based around the midpoint of the available interrupts (0x80) rather than at the top end....that allows for interrupts to be defined above (or, indeed, below) them as needed by the application. This should have no functional effect on existing code but adds in a clean capability to define higher priority interrupts.
2018-12-03 17:41:59 -06:00
Gregory Nutt
83bc1c97c3
Rename irqsave() and irqrestore() to up_irq_save() and up_irq_restore()
2016-02-14 16:11:25 -06:00
Gregory Nutt
f4115ab45c
Correct LPC11xx priority definitions + fix some typos in comments
2016-01-25 07:36:26 -06:00
Gregory Nutt
0add2b8910
arch/arm/include/samv7: Add support for the SAME70 family
2015-11-14 11:36:21 -06:00
Gregory Nutt
348060f5d2
SAMV7: Add QSPI Register Definition Header File
2015-08-14 18:11:01 -06:00
Gregory Nutt
9b6c7661a4
SAMV7: Add TWI/I2C driver (untested)
2015-03-12 10:58:11 -06:00
Gregory Nutt
2571d6202d
SAMV71-XULT: Add heap allocation logic
2015-03-07 11:46:54 -06:00
Gregory Nutt
67c21e6817
SAMV7 Kconfig: Add peripheral selections
2015-03-05 13:51:39 -06:00
Gregory Nutt
02e613b277
Add basic build directories and configuration logic for the SAMV7 family
2015-03-05 10:00:24 -06:00
