Commit Graph

4280 Commits

Author SHA1 Message Date
Gregory Nutt
972ae84d95 SAMA5D2: Add logic to enable Flexcom clocking and to configure Flexcom pins 2015-09-11 14:54:30 -06:00
Gregory Nutt
b19c3d7cbe SAMA5D2: Add Flexcom UART serial driver 2015-09-11 14:30:19 -06:00
Gregory Nutt
9385a98588 SAMA5D: Move common configuration logic from sam_lowputc.c and sam_serial.c to new sam_config.h. Make room in the architecture for forthcoming Flexcom USARTs 2015-09-11 12:00:30 -06:00
Gregory Nutt
a39b2351f0 SAMA5D2: Add Flexcom register definition header files 2015-09-11 10:40:12 -06:00
Gregory Nutt
f51541dfd6 SAMA5Dx UART: SAMAD4 also has BRSRCCK bit in the MR register 2015-09-11 08:27:18 -06:00
Paul A. Patience
260778feb1 Fix typo 2015-09-10 21:07:03 -04:00
Gregory Nutt
cf7ea3bc3e Updates for SAMA5D2: It has no USARTS 2015-09-10 17:15:52 -06:00
Gregory Nutt
2cdbc17a63 SAMA5: Fix support for varying number of PIO ports 2015-09-10 13:46:57 -06:00
Gregory Nutt
c1b83cfbc8 SAMA5D2: Add pin multiplexing definition file and other necessary changes for the SAMA5D2 2015-09-10 13:07:04 -06:00
Gregory Nutt
7ad8c32adf Trivial spacing change 2015-09-10 12:11:10 -06:00
Ilya Averyanov
0fea56cd8b LPC43xx: Add ehci driver. 2015-09-10 07:23:03 -06:00
Gregory Nutt
87aa1cb83b SAMA5D2: Update PMC definitions; has UART2-4, but not USART0-4 2015-09-09 12:11:45 -06:00
Gregory Nutt
c391ada5e7 SAMA5D2: Update boot logic, AXIMX, SFR, and WDT register definition files for SAMA5D2 2015-09-09 10:00:29 -06:00
Ilya Averyanov
76ab22debf LPC43xx: Fix IRQ Ethernet name 2015-09-09 07:22:02 -06:00
Gregory Nutt
5f54db8c17 Separate memory mapping tables for SAMA5D2, 3, and 4 2015-09-08 16:40:13 -06:00
Gregory Nutt
6e900bc88a Eliminate warning 2015-09-08 13:26:51 -06:00
Gregory Nutt
36f1d84374 Remove some nonfunctional logic that also generates warnings 2015-09-08 13:02:33 -06:00
Gregory Nutt
0f8a416b20 More fixes for warning removal typos 2015-09-08 12:15:29 -06:00
Gregory Nutt
35866ede44 Eliminate warnings 2015-09-08 12:02:35 -06:00
Gregory Nutt
e7c149e545 Yet another rething of the SAMA5 memory mapping definitions 2015-09-08 11:50:30 -06:00
Gregory Nutt
e6aba39805 SAMA5: Correct some memory map logic 2015-09-08 11:35:11 -06:00
Gregory Nutt
2138e16199 Eliminate warnings 2015-09-08 11:08:44 -06:00
Gregory Nutt
2913aac866 Eliminate warnings 2015-09-08 10:20:41 -06:00
Gregory Nutt
e354853776 Elminiate some warnings 2015-09-08 09:18:59 -06:00
Gregory Nutt
d8c83218fe Eliminate warnings 2015-09-08 08:27:34 -06:00
Gregory Nutt
7065f78b92 Eliminate a warning 2015-09-08 08:18:01 -06:00
Gregory Nutt
cfd41bdb30 STM32: Eliminate some warnings 2015-09-07 16:25:54 -06:00
Ilya Averyanov
560613622d EHCI: We not need disable and enable async scheduler when 2015-09-07 13:44:56 -06:00
Ilya Averyanov
8cc83fa6dc EHCI: Fix qh_ioccheck to move bp to next QH 2015-09-07 13:42:39 -06:00
Ilya Averyanov
6799bba3c1 EHCI: Rename asynch_setup to ioc_async_setup 2015-09-07 13:36:52 -06:00
Gregory Nutt
f3af146d44 SAMV7 QSPI: Back out part of last change; byte access are necessary. Correct write to the IAR register 2015-09-06 11:24:43 -06:00
Gregory Nutt
26eada3446 In all up_initialize() functions, automatically initialize TUN driver is so configureded 2015-09-06 09:35:29 -06:00
Gregory Nutt
b30e6a696e SAMV71 QSPI: Add methods to allocate properly aligned memory. 2015-09-06 09:34:51 -06:00
Gregory Nutt
da3c05a898 Minor changes from review of merge 2015-09-06 07:10:21 -06:00
pnb
55dcbb4ca2 efm32 addons missing file 2015-09-06 13:10:41 +02:00
Gregory Nutt
9d5f04cd45 Remove some crap from the SAMA5D2 memory map header file 2015-09-05 12:43:34 -06:00
Gregory Nutt
6488fe469d SAMA5D Kconfig: SAMA5D2 has P310 L2 cache 2015-09-05 12:15:50 -06:00
Gregory Nutt
975d912b40 Cosmetic: Move # of pre-processior command to column 1 2015-09-05 09:07:37 -06:00
Gregory Nutt
2ed09233d3 Changes to conform to coding standard. 2015-09-05 07:50:02 -06:00
Gregory Nutt
60d444cd69 Changes to conform to coding standard. Also, I assume references to STM32 should be EFM32? 2015-09-05 07:33:50 -06:00
Gregory Nutt
e714cd748c Changes to conform to coding standard. Also, I assume references to STM32 should be EFM32? 2015-09-05 07:31:16 -06:00
pnb
1314f60caf start of adc for efm32 2015-09-05 10:51:33 +02:00
Pierre-noel Bouteville
85b1638171 Merged nuttx/arch into master 2015-09-05 10:42:12 +02:00
pnb
c327cce0b8 add bitband support 2015-09-05 10:40:34 +02:00
pnb
c83d533d90 add flash read/write support 2015-09-05 10:37:53 +02:00
pnb
3c35458ac2 fix some I2C problem 2015-09-05 10:22:08 +02:00
pnb
ea596e45d3 add efm32_gpioirqclear 2015-09-05 10:20:24 +02:00
pnb
ed8531a53b GPIO fix bug GPIO_DRIVE_... definition 2015-09-05 10:17:05 +02:00
pnb
9564f878a9 set Gpio drive only if not standard 2015-09-05 10:15:42 +02:00
pnb
fa65bef573 commetic 2015-09-05 10:11:06 +02:00