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Author SHA1 Message Date
Juha Niskanen
a35d205f3b arch/arm/src/stm32l4/stm32l4_pwm.c: fix printf format 
Signed-off-by: Juha Niskanen <juha.niskanen@haltian.com>
 2021-12-10 12:30:26 -06:00
Masayuki Ishikawa
8438813ebe boards: spresense: Update smp/defconfig 
Summary:
- Add CONFIG_ARCH_LEDS_CPU_ACTIVITY=y
- Add CONFIG_BOARDCTL_RESET=y

Impact:
- None

Testing:
- Tested with ostest

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
 2021-12-10 06:46:22 -06:00
Jari van Ewijk
2e47ef32cf GPIO driver: register all pintypes as generic /dev/gpioN 2021-12-09 23:55:12 -06:00
Daniel Agar
efc949bceb arch/arm/src/stm32/Kconfig STM32_STM32F412 add SPI2 & SPI3 2021-12-09 21:30:41 -06:00
Masayuki Ishikawa
a8d446851c fs: fat: Use uint16_t instead of wchar_t 
Summary:
- Due to the recent changes of wchar_t, ls command always
  causes errors for the fat file system.
- This commit fixes this issue by replacing wchar_t with
  uint16_t under fs/fat

Impact:
- None

Testing:
- Tested with spresense:wifi and stm32f4discovery:wifi

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
 2021-12-09 21:29:29 -06:00
Jari van Ewijk
bcf9b4e5cd timer-gpout example renamed to timer-gpio 2021-12-09 12:00:36 -06:00
chao.an
3d75c25737 cortex-m/hardfault: enhance the dump information of mem/hard-fault 
Signed-off-by: chao.an <anchao@xiaomi.com>
 2021-12-09 11:42:21 -06:00
chao.an
66e604b40e cortex-m/hardfault: add usage-fault handler 
Signed-off-by: chao.an <anchao@xiaomi.com>
 2021-12-09 11:42:21 -06:00
chao.an
2f449245cc cortex-m/hardfault: add bus-fault handler 
Signed-off-by: chao.an <anchao@xiaomi.com>
 2021-12-09 11:42:21 -06:00
chao.an
99fa58c871 arm/cortex-m23: armv8-m baseline do not support mem-fault 
Signed-off-by: chao.an <anchao@xiaomi.com>
 2021-12-09 05:36:00 -06:00
chao.an
3e812dd88c cortex-m/fault: add CFSR(Configurable Fault Status Register) Definitions 
Signed-off-by: chao.an <anchao@xiaomi.com>
 2021-12-09 04:30:06 -06:00
Xiang Xiao
6357523892 arch: Add _wchar_t typedef like other basic types 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-12-09 16:57:23 +09:00
Xiang Xiao
334bb9768a Revert "sim: Specify -fshort-wchar as NuttX wchar_t is 16-bit" 
It's better to apply the default compiler option to improve the compatibility
This reverts commit 3fc06ff2d1.
 2021-12-09 16:57:23 +09:00
chao.an
9b502dca05 arm/backtrace: disable the sanitize address check 
Signed-off-by: chao.an <anchao@xiaomi.com>
 2021-12-09 01:05:46 -06:00
chao.an
7a61588b00 cortex-m/backtrace: remove the push process to simplify backtrace 
Signed-off-by: chao.an <anchao@xiaomi.com>
 2021-12-09 01:05:46 -06:00
chao.an
437c81f8d0 cortex-m/assert: dump all registers with alias 
Signed-off-by: chao.an <anchao@xiaomi.com>
 2021-12-09 00:16:04 -06:00
chao.an
0161da4415 sched/dumpstack: raise the stack dump level to emergency 
since sometimes dumpstack will be used in extreme situations(eg. assert)

Signed-off-by: chao.an <anchao@xiaomi.com>
 2021-12-09 00:14:30 -06:00
Masayuki Ishikawa
83edd2fbba sched: signal: Introduce a private spinlock in sig_action.c 
Summary:
- This commit introduces a private spinlock in sig_action.c

Impact:
- None

Testing:
- Tested with spresense:wifi_smp and spresense:wifi

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
 2021-12-09 00:13:31 -06:00
ligd
2f55807acb sched/signal: add spinlock to g_sigfreeaction 
To avoid nxsig_alloc_action() & nxsig_release_action() competition

Signed-off-by: ligd <liguiding1@xiaomi.com>
 2021-12-09 11:55:24 +09:00
Michal Lenc
ae57492189 samv7: enable MCAN driver support for both rev A and rev B 
This commit enables the MCAN driver to function with both rev A and rev B
version of the chip. The version of the chip is selected automtically from
SAM_CHIPID_CIDR register so there is no need to predefined it in the
configuration.

The functonality was tested on rev B version of the chip. The rev A was
not tested since I do not have the functional board but the code remains
the same as in the previous NuttX version so it should not cause any
additional troubles.

The code is co-authored by Miloš Pokorný who wrote the initial transition
to rev B of the chip.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
Co-authored-by: Miloš Pokorný <milos.pokorny@seznam.cz>
 2021-12-07 23:36:11 -06:00
Huang Qi
58e0781e2e arch/arm: Implement TLS support 
Signed-off-by: Huang Qi <no1wudi@qq.com>
 2021-12-07 23:31:41 -06:00
zhuyanlin
3e8a3c9cc2 driver:regulator: add delay feature 
N/A
 2021-12-07 23:29:05 -06:00
zhuyanlin
b7db4304d6 driver/power: add gpio regulator 
N/A

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2021-12-07 23:29:05 -06:00
zhuyanlin
eed6510202 driver:power:add regulator remote proc 
N/A

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2021-12-07 23:29:05 -06:00
zhuyanlin
c8f1a9e430 driver:power:add regulator framework 
N/A

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2021-12-07 23:29:05 -06:00
Masayuki Ishikawa
bec9058b4c arch: lc823450: Replace the critical section with spinlock in lc823450_serial.c 
Summary:
- This commit replaces the critical section with spinlock
- The logic is the same as cxd56_serial.c

Impact:
- None

Testing:
- Tested with lc823450-xgevk:bt

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
 2021-12-07 23:28:54 -06:00
Huang Qi
3d4be7089c drivers/serial/uart_16550: Fix warning for format 
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
 2021-12-07 23:28:33 -06:00
Huang Qi
63ab2f4308 arch/risc-v: Introduce basic support for qemu rv32 
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
 2021-12-07 23:28:33 -06:00
raiden00pl
54e3b148e9 arch/sim/src/sim/up_assert.c: fix implicit declaration warning 2021-12-07 07:51:44 -06:00
anjiahao
9d6c92f0fa arch:move debug.h form headfile to c file 
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
 2021-12-07 04:01:27 -08:00
anjiahao
f9570810c0 libc/misc/err.c:add err.c to libc 
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
 2021-12-07 04:01:27 -08:00
fenghang
c39ef4420e 1.phyplus update files to accord with the requirement of chcekpatch.sh 
2.fix some files to fix compile warning

3.remove blueteeth header files, which are not used in nuttx core.

4.fix configs and add lost files

5.update defconfig, remove useless items

6.fix compile warning for nuttx phyplus

7.delete useless: ble, h4, zblue defconfig files form phyplus configure folder

8.fix file format check error on phyplus source code

9.fix phyplus kconfig param error

10.update configure file for nuttx
 2021-12-07 01:37:29 -06:00
fenghang
073c9880a3 phyplus first submit 2021-12-07 01:37:29 -06:00
zhuyanlin
565964a12f driver: add clk framework 
N/A

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2021-12-07 01:35:45 -06:00
Masayuki Ishikawa
264a03f04c boards: lc823450-xgevk: Update bt/defconfig for SMP 
Summary:
- Remove dvfs, netinit, pipe, instrumentation, hpwork
- Add SMP related configs, ntpc

Impact:
- lc823450-xgevk:bt only

Testing:
- Tested with ostest and btstack (external)

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
 2021-12-06 22:10:15 -06:00
Xiang Xiao
a6eb6df688 libc/getopt: Move struct getopt_s to include/nuttx/tls.h 
and remove include/nuttx/lib/getopt.h

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-12-06 06:30:16 -08:00
Abdelatif Guettouche
490ac188c2 Documentation/esp32: Remove the open issues section. 
1. Issues regarding caching:  The ESP32 has no D-Cache and thus the
   issues described there do not apply.
2. Issue regarding assertion: No chip does this at the moment.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-12-06 07:15:58 -06:00
zhuyanlin
043d193fff tcbinfo:sched: fix build break 
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2021-12-06 00:47:58 -06:00
chao.an
437a30d117 arch/tcbinfo: fix build break if task name disabled 
Signed-off-by: chao.an <anchao@xiaomi.com>
 2021-12-06 00:47:58 -06:00
Dong Heng
698f1f76ff risc-v/esp32c3: Refactor SPI Flash to support umask interrupt when R/W/E SPI Flash 
This can fix BLE assert when erase SPI Flash.
 2021-12-06 13:13:11 +09:00
Xiang Xiao
a0990ee416 arch: Remove the duplicated up_tls_info implementation 
Define up_tls_info in arch/arch.h directly if the general one isn't suitable

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-12-05 20:59:53 -06:00
Xiang Xiao
19e5ee6ce0 arch: Remove FILE dump code from _up_dumponexit 
since the kernel build can't access the userspace memory
inside other process directly

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-12-06 11:23:58 +09:00
Xiang Xiao
1ba1f3f24b tools/size_report.py: Fix the lint error 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-12-05 16:55:52 +01:00
Xiang Xiao
9bc00c4b58 tools: Rename size_report to size_report.py 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-12-05 16:55:52 +01:00
Huang Qi
a24005b70b drivers/serial: Fix offset calculation in 16550 
Signed-off-by: Huang Qi <no1wudi@qq.com>
 2021-12-05 07:02:40 -06:00
Petro Karashchenko
e71b66c792 drivers/mtd: add MTD null driver support 
- fix memory leak during RAM MTD initialization
- fix calculations for FILE MTD device with customized
  block and erase sizes

Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
 2021-12-05 03:11:02 -06:00
raiden00pl
59786bf208 boards/nucleo-f302r8: add 3ph Hall sensor support 2021-12-04 08:51:25 -06:00
ligd
4dfefb4e06 boards/sim: update sim for 'merge hostfs_rpmsg to rpmsgfs' 
Signed-off-by: ligd <liguiding1@xiaomi.com>
 2021-12-04 01:04:18 -06:00
ligd
985cc4fc6d hosfs_rpmsg: merge hostfs_rpmsg to rpmsgfs 
Signed-off-by: ligd <liguiding1@xiaomi.com>
 2021-12-04 01:04:18 -06:00
Lingao Meng
5ed85ef476 tools: Adapt Zephyr/zephyr to Nuttx/nuttx 
Adapt Zephyr/zephyr to Nuttx/nuttx

Signed-off-by: Lingao Meng <menglingao@xiaomi.com>
 2021-12-03 08:16:52 -06:00