Commit Graph

20933 Commits

Author SHA1 Message Date
Tiago Medicci Serrano
8673e659b4 espressif: quiet git commands and improve build logging
Add `--quiet` to git commands to avoid unnecessary logging during
the operation and add summarized logs to show progress.
2023-07-27 19:43:48 -07:00
Tiago Medicci Serrano
e38b4b2103 espressif: fix linker to include the reserved area of RTC memory
Basically, it reserves an area of the RTC memory to preserve the
RTC timer.

Please refer to:
fa76c82a5b

This commit also removes the rtc.dummy section because C3, C6 and
H2 don't need to skip it once the region is accessed by the same
address space using the instruction and data bus.
2023-07-27 19:43:48 -07:00
Tiago Medicci Serrano
8e343405a2 espressif: update esp-hal-3rdparty
The esp-hal-3rdparty release include general bugfixes.
2023-07-27 19:43:48 -07:00
hujun5
68187b68af arch: move [enter|leave]_critical_section
move [enter|leave]_critical_section to the same place for easy to understand
and call matching

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2023-07-27 11:34:09 +02:00
SPRESENSE
b515f9a360 arch: cxd56xx: Fix compile error
Add inttypes.h to fix a compile error in cxd56_emmc.c.
2023-07-26 22:14:31 -07:00
Ville Juven
6bafdd45fd riscv/mpfs: Set hart2 default entrypoint to -1 like the others
No reason to have a different entrypoint
2023-07-26 19:58:05 -03:00
anjiahao
2645e59901 sim/tcbinfo:add ebp to tcbinfo
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2023-07-26 06:57:25 -07:00
raiden00pl
ef252fc0fc arch/nrf91/modem: fix returned source address 2023-07-26 04:51:05 -07:00
guoshichao
3524f4b9ce libs/libc/fork: add lib_fork implementation
1. add lib_fork api in libs/libc, we need a fork() api to implement the
fork relative method, such as pthread_atfork
2. rename the assembly fork entry function name to up_fork(), and rename
the up_fork() to arch specific name, such as
sim_fork()/arm_fork()/mips_fork() etc.

Signed-off-by: guoshichao <guoshichao@xiaomi.com>
2023-07-26 10:41:52 +02:00
Xiang Xiao
46b25b3849 arch: Compute the array size by nitems
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-07-26 09:33:38 +02:00
Xiang Xiao
7ca4c916eb arch/sparc: Add g_tcb_info
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-07-26 09:33:38 +02:00
Xiang Xiao
94f273130e arch/x86_64: Add g_tcb_info
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-07-26 09:33:38 +02:00
Xiang Xiao
8d46cfd8e5 arch/x86: Add g_tcb_info
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-07-26 09:33:38 +02:00
Xiang Xiao
f3269a6caa sched: Rename DEBUG_TCBINFO to ARCH_HAVE_TCBINFO
and select if the arch support to define g_tcbinfo variable

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-07-26 09:33:38 +02:00
anjiahao
d5347d8915 arm64:fix ostest failed to run
The reason for the failure is incorrect sp,
resulting in the failure to restore the register

Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2023-07-25 16:37:49 -03:00
Tiago Medicci Serrano
dacb4e87b6 espressif: get esp-hal-3rdparty sources based on its version
Clone the esp-hal-3rdparty repository and, then, checkout to a
specific version (usually indicated by the commit SHA) instead of
using a branch as the HEAD.
2023-07-25 09:44:59 -07:00
raiden00pl
60200b6c9b arch/nrf91: make all interrupts non-secure only if CONFIG_NRF91_SPU_NONSECURE=y
this fixes configurations that works only in secure environment (for testing and dev purposes)
2023-07-25 08:49:24 -07:00
raiden00pl
e48d730273 cmake: enable more cmake builds 2023-07-25 06:18:22 -07:00
chao an
49dec5b48c cmake/build: fix build break on cmake
Signed-off-by: chao an <anchao@xiaomi.com>
2023-07-25 15:00:10 +02:00
raiden00pl
dffb472ad9 cmake: port stm32f0l0g0 2023-07-24 10:13:26 -07:00
zhangyuan21
9792211b96 sched/tcbinfo: add stack info to tcbinfo
Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2023-07-24 09:47:12 -07:00
anjiahao
8abf803a1d arm64:Need to store native sp pointer to tcb
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2023-07-23 21:59:35 -07:00
anjiahao
ceb6bb6650 arm64:support arm64 for tcb info
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2023-07-23 21:59:35 -07:00
anjiahao
eadfdab9a7 sim:add sim32 & sim64 tcbinfo
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2023-07-23 21:59:35 -07:00
anjiahao
9f644579b3 fix sim register & tcb info typo
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2023-07-23 21:59:35 -07:00
kcheshmedzhiev
ea87d008a0 Initial support for NUCLEO-U5A5ZJ-Q board
Fix for ci error

Typo changes

Fixed typo in boards/arm/stm32u5/nucleo-u5a5zj-q/src/stm32_bringup.c

Typo changes

Typo fixes

Typo fixes

Typo changes

Typo changes

Typo changes
2023-07-23 18:42:05 -07:00
Victor Benso
0c5145b7d1 New implementation of the ESP32's RMT driver. 2023-07-23 16:17:57 -03:00
raiden00pl
eb965d5fec arch/nrf91: add support for modem sockets 2023-07-23 19:56:38 +08:00
raiden00pl
6bd5452588 arch/nrf91: fixes for modem OS integration 2023-07-23 19:56:38 +08:00
raiden00pl
aa5ac49a21 arch/nrf91: convert modem AT interface to serial device 2023-07-23 19:56:38 +08:00
raiden00pl
b3c5e05add arch/nrf91: fix modem initialization 2023-07-23 19:56:38 +08:00
Lucas Saavedra Vaz
c31681df54 arch/risc-v/espressif: Add PWM (LEDC) support
Add support for the PWM peripheral to ESP32-C3/C6/H2 by using the Espressif HAL
2023-07-23 01:11:38 +08:00
Jukka Laitinen
8766865e09 arch/risc-v/src/mpfs: Add configuration option to enable DDR manual addcmd training
Also switch to automatic one by default, as it saves a lot of flash. The manual training
code is left in for now to be able to use it as an option if there are problems with automatic one

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2023-07-21 16:36:04 -03:00
yintao
0b01340aec nuttx/sim: use workquene instead rptun_loop
Signed-off-by: yintao <yintao@xiaomi.com>
2023-07-21 20:46:59 +08:00
chao an
ee6e2ce149 arch/perf: add ARCH_HAVE_PERF_EVENTS to support hardware perf events
The implementation of up_perf_*() is in a different static library in nuttx:

Hardware: libarch.a
Software: libdrivers.a (weak function)

Since functions with weak attributes cannot be correctly replaced in multiple static libraries,
this PR will use macros to replace whether the arch supports hardware perf events

Signed-off-by: chao an <anchao@xiaomi.com>
2023-07-21 20:43:30 +08:00
chao an
4b94dc3092 toolchain/gcc: fix linker error if enable STACK_CANARIES/LTO at same time
If -fstack-protector-all is enabled, gcc linker will need GCC
SSP(Stack Smashing Protector) support, Since the implement of SSP
is related to the OS, most of embedded toolchain does not provide
ssp support, so an error will be reported when linking:

enable CONFIG_LTO_FULL && CONFIG_STACK_CANARIES

arm-none-eabi/bin/ld: cannot find -lssp_nonshared: No such file or directory
arm-none-eabi/bin/ld: cannot find -lssp: No such file or directory

https://github.com/gcc-mirror/gcc/blob/master/gcc/gcc.cc#L983-L985

Since nuttx has already implemented SSP related hook functions,
so in this PR, we filter out this option in the link phase to ensure that
the implementation of lssp/lssp_nonshared will not be referenced

Signed-off-by: chao an <anchao@xiaomi.com>
2023-07-21 01:13:34 +08:00
Zhihong Chen
0fab64cd95 hpmicro: hpm6750: keep cpu clock on after "wfi", so that mchtmr can work after "wfi"
- keep cpu clock on after "wfi", so that mchtmr can still work after "wfi"

Signed-off-by: Zhihong Chen <zhihong.chen@hpmicro.com>
2023-07-20 18:15:29 +08:00
Xiang Xiao
a51be33a41 libc/tls: Change the default value of TLS_NELEM to zero
to ensure the default config as small as possible.

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-07-20 08:11:30 +02:00
Jukka Laitinen
c269adbff1 arch/risc-v/src/mpfs/mpfs_ddr.c: Correct erroneous register addresses in DDR training
Writes to MPFS_CFG_DDR_SGMII_PHY_EXPERT_DFI_STATUS_OVERRIDE register were not done properly. Use correct address for writes.

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2023-07-18 10:11:10 -03:00
Eero Nurkkala
b79671a336 risc-v/mpfs: emmcsd: fix csd read
Reading the CSD field misses 3 bytes as the residual bytes
are not carried over properly. Fix this by adding the missing
bytes due to shifting.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2023-07-17 23:05:37 +08:00
Xiang Xiao
427f8a1624 arch: Fix the mismath in comment
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-07-16 14:39:20 -03:00
Xiang Xiao
abfe082a6f Kconfig: Simplify the conditional default statement
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-07-16 14:39:20 -03:00
Xiang Xiao
e031a73aef Kconfig: Change some "default y" to "default !DEFAULT_SMALL"
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-07-16 14:39:20 -03:00
Xiang Xiao
4d8eedb09a arch/sim: Link to libgcov.a when CONFIG_ARCH_COVERAGE is enabled
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-07-16 14:39:20 -03:00
chao an
f10b54a081 cmake: fix CMake build break
Signed-off-by: chao an <anchao@xiaomi.com>
2023-07-15 23:32:36 +08:00
chenrun1
cafbbb1ded armv7amr/v8m:Modify hardcodes to macro definitions and update commit.
Signed-off-by: chenrun1 <chenrun1@xiaomi.com>
2023-07-15 15:11:07 +08:00
chenrun1
9c2bc0edbe armv7m/v8m:Restore the CSSELR state before setting.
Signed-off-by: chenrun1 <chenrun1@xiaomi.com>
2023-07-15 15:11:07 +08:00
chenrun1
823c3b32e7 armv8m:fix warning up_get_cache_size defined but not used.
Signed-off-by: chenrun1 <chenrun1@xiaomi.com>
2023-07-15 15:11:07 +08:00
chenrun1
665a140b21 armv7/v8:Fix configuration csselr default configuration error.
Signed-off-by: chenrun1 <chenrun1@xiaomi.com>
2023-07-15 15:11:07 +08:00
chenrun1
22d1059c97 armv7/8 cache: add up_get_xcache_size() support
Signed-off-by: chenrun1 <chenrun1@xiaomi.com>
2023-07-15 15:11:07 +08:00