Gregory Nutt
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d35723749b
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Minor address environment clean-up. Cannot generate debug contexts in certain contexts
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2014-08-27 14:22:00 -06:00 |
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Gregory Nutt
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c3a498264e
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CC3200 Launchpad updates
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2014-08-26 16:31:47 -06:00 |
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Gregory Nutt
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2c40815569
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Support the the TC3200 from Jim Ewing
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2014-08-26 15:13:57 -06:00 |
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Gregory Nutt
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0db7da1858
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Add up_addrenv_coherent which will be called before address environment switches
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2014-08-26 14:53:19 -06:00 |
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Gregory Nutt
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519e9c85e9
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up_coherent_dcache should do nothing the the length is zero
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2014-08-26 14:51:53 -06:00 |
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Gregory Nutt
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b13d9b4161
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Rename up_addrenv_assign() to up_addrenv_clone() and generalize its arguments so that can be used for other purposes
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2014-08-26 12:16:05 -06:00 |
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Gregory Nutt
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a14cb94b45
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Mostly cosmetic use of uintptr_t to hold addresses instead of uint32_t
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2014-08-26 10:44:10 -06:00 |
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Gregory Nutt
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3a44227caa
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Fix confusion about what is a page of data and what is a page of L2 page table; restructure functions to reduce duplicated logic
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2014-08-26 10:41:43 -06:00 |
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Gregory Nutt
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dbeba82e85
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Add lots of debug output
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2014-08-26 07:54:43 -06:00 |
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Gregory Nutt
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66a5328a68
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Cortex-A address environment: Fix some section mapping and address increments
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2014-08-26 06:33:26 -06:00 |
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Gregory Nutt
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e87804cc8c
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ARMv7-A: Use of write back might be unpredictable
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2014-08-25 16:34:22 -06:00 |
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Gregory Nutt
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00f5e8f70e
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Bugfixes.. still integrating SAMA5 ELF with address environment
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2014-08-25 15:27:58 -06:00 |
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Gregory Nutt
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17cc5caa98
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SAMA5 ELF configuration with address environments finally builds without errors
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2014-08-25 13:59:02 -06:00 |
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Gregory Nutt
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1725946447
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Misc changed to get the SAMA5 ELF configuration with address environments working
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2014-08-25 13:28:13 -06:00 |
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Gregory Nutt
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e1799b0423
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Cortex-A/SAMA5 address environment support is code complete (untested)
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2014-08-25 11:18:32 -06:00 |
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Gregory Nutt
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e0a48b60b6
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Change naming of ELF interfaces from arch_ to up_ for consistency
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2014-08-25 06:47:14 -06:00 |
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Gregory Nutt
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7aea220ebf
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After cached related fix, the ELF example is now functional
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2014-08-24 14:12:45 -06:00 |
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Gregory Nutt
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10b621ac10
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Modify ADDRENV Kconfigs. Z180 does not need all of the virtual address settings that the ARM does
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2014-08-24 12:54:37 -06:00 |
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Gregory Nutt
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241a7e17bd
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addrenv interface changes: up_addrenv_create() may need to create .text and .bss/.data separately because of differing access privileges (read/execute vs read/write). And, as a consequence, up_addrenv_vaddr() needs to be split into up_addrenv_vtext(0 and up_addrenv_vdata().
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2014-08-24 11:54:14 -06:00 |
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Gregory Nutt
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2cb9d5c7b0
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Add addrenv.h; First cut at Cortex-A address environment structures; Add configuration options to setup address enviornment
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2014-08-24 09:57:53 -06:00 |
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Gregory Nutt
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1624e2fbcf
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Change CONFIG_ADDRENV to CONFIG_ARCH_ADDRENV; change how it is selected -- the architecure must first declare support
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2014-08-24 06:42:11 -06:00 |
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Gregory Nutt
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03830250e7
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ARMv7-A: Add skeleton environment and build support for process address environments
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2014-08-23 18:59:24 -06:00 |
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Gregory Nutt
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3bd810b316
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Add option to select 64-bit build platform
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2014-08-22 18:21:32 -06:00 |
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Gregory Nutt
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081f88b4b9
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STM32 serial: MAke uart_devs[] const. From Freddie Chopin
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2014-08-22 16:20:52 -06:00 |
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Gregory Nutt
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4af3e1cfa1
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Recent STM32 UART change: Wasn't that logic backward? Shouldn't that have been disable the USART if (1) we don't have than many USARTs OR (2) we don't have that particular USART -- not AND.
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2014-08-22 16:16:23 -06:00 |
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Gregory Nutt
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e79d6e3c8b
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A few fixes for compilation errors due to recent address environment fixes
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2014-08-22 15:55:00 -06:00 |
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Gregory Nutt
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4d029ee13b
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uintptr_t should be 64-bits under Cygwin64
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2014-08-22 15:18:55 -06:00 |
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Gregory Nutt
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1d586e6136
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An address environment is the property of a task group, not of a thread
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2014-08-22 12:32:34 -06:00 |
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Gregory Nutt
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150fcfb5b8
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STM32 F401: Only 3 USARTS, but need to set STM32_NUSARTS to six because they are not numbered sequentially
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2014-08-22 09:02:58 -06:00 |
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Gregory Nutt
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de3dd8e96b
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STM32 F401: Correct support for USART6 on this chip. From Freddie Chopin
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2014-08-22 06:49:16 -06:00 |
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Gregory Nutt
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ad9b3f8ab8
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wdog.h does not contain any application interface, only internal OS interface. Further, it is non-standard. Move wdog.h from include/ to include/nuttx. For the same reason, move the description of the watchdog timer interfaces from the Users Guide to the Porting Guide.
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2014-08-21 11:16:55 -06:00 |
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Gregory Nutt
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3b07378b38
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NSH link management now works! The last fix was to the Ethernet drivers: They cannot disable clocking to the Ethernet blok on ifdown. Otherwise, we cannot communicate with the PHY
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2014-08-17 17:54:46 -06:00 |
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Gregory Nutt
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004788d7c0
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Change the way PHY interrupts work: disable automatically. Then we have to re-subscribe each time after the interrupt fires
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2014-08-17 16:51:56 -06:00 |
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Gregory Nutt
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e04ab2bcfc
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In order to get PHY interrupts, they must be enabled at the PHY (still don't get PHY interrupts)
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2014-08-17 13:03:18 -06:00 |
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Gregory Nutt
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5ba42680ac
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For all SAM Ethernet, need to enable management interface before reading PHY regisers in IOCTL
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2014-08-17 11:09:54 -06:00 |
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Gregory Nutt
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ab78e8a0c5
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SAM3/4 Ethernet: Clone ioctl support from the SAMA5
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2014-08-17 06:54:37 -06:00 |
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Gregory Nutt
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d87013a665
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Use the device name assigned by the registration process, not our best guess
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2014-08-16 15:14:39 -06:00 |
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Gregory Nutt
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057af36c1d
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More of the PHY event notification logic change: Fix some compile errors when full feature is enabled; Add some missing ioctol logic
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2014-08-16 15:04:09 -06:00 |
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Gregory Nutt
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68e55c454c
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Implement all network ioctls, including the new ioctl to setup PHY event notifications.
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2014-08-16 14:09:14 -06:00 |
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Gregory Nutt
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f33510a394
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Modified to support the change to the network ioctl signature changes. Also add support for new ioctl to setup PHY event notifications.
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2014-08-16 14:08:58 -06:00 |
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Gregory Nutt
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c9ba1d4091
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Fix conditional compilation error
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2014-08-12 10:00:58 -06:00 |
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Gregory Nutt
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7025465109
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Adds support for localtime. From Max Neklyudov
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2014-08-12 06:18:22 -06:00 |
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Gregory Nutt
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56196ecea1
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Fix a computation error in the fix for the last computational error
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2014-08-11 12:07:49 -06:00 |
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Gregory Nutt
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51da249d0e
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Correct time conversion, 1000000 not 1000 to convert seconds to microseconds.
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2014-08-11 11:14:10 -06:00 |
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Gregory Nutt
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f2058fa271
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Comment out reassessment of timer in the middle of context switches. Need to revisit
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2014-08-11 07:05:47 -06:00 |
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Gregory Nutt
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cd53f96f11
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SAMA5 Tickless: Corrects some logic errors with timer/counter frequency
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2014-08-10 19:04:18 -06:00 |
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Gregory Nutt
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8855c1369b
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Cosmetic
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2014-08-10 16:09:45 -06:00 |
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Gregory Nutt
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c7a51f4ef1
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Cosmetic changed, updated README files, improved comments
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2014-08-10 13:11:31 -06:00 |
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Gregory Nutt
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71e18367f6
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Don't try to return time remaining if the timespec pointer is NULL
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2014-08-10 11:39:16 -06:00 |
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Gregory Nutt
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a5514be85c
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Move TC debug options to one file
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2014-08-10 11:38:44 -06:00 |
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Gregory Nutt
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219c1a68d3
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Update comments
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2014-08-10 11:38:08 -06:00 |
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Gregory Nutt
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320707fdfa
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SAMA5: Fix bugs in timer/counter interrupts and one-shot timer
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2014-08-10 10:47:38 -06:00 |
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Gregory Nutt
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6324df44e8
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SAMA5 Timer/counter repair: Missing sem_post() caused a hang
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2014-08-09 18:34:52 -06:00 |
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Gregory Nutt
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d1d1d76189
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SAMA5: Use the one-shot and free-running timers to implement tickless OS support for SAMA5
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2014-08-09 17:14:51 -06:00 |
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Gregory Nutt
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569d5d7218
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SAMA5 free-running timer: Add support for a free-running timer wrapper around the low-level timer/counter logic.
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2014-08-09 16:43:48 -06:00 |
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Gregory Nutt
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acb05460d0
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SAMA5 oneshot: Some clean-up and correction to the initial implementation
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2014-08-09 16:42:04 -06:00 |
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Gregory Nutt
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d8aa6c01bd
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SAMA5 timer/counter: Add support for a one-shot timer wrapper around the low-level timer/counter logic. This also involved several changes that rippled into the ADC driver (untested).
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2014-08-09 15:27:55 -06:00 |
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Gregory Nutt
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5803fb78b8
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SAMA5 T/C: Can now handle non-constant BOARD_MCK_FREQUENCY. Also now supports methods to attach user interrupt handlers
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2014-08-09 10:30:45 -06:00 |
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Gregory Nutt
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da0de3284e
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Fix errors in documentation and comments related to the Tickless OS. From Vijay Kumar
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2014-08-09 06:41:38 -06:00 |
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Gregory Nutt
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e1769b22f1
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Remove os_internal.h it has been replace by several new header files under sched/. There have been some sneak inclusion paths via os_internal.h, so expect a few compilation errors for some architectures
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2014-08-08 18:39:28 -06:00 |
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Gregory Nutt
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d798dd37a7
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Replace os_internal.h with sched/sched.h in files that actually reference something in sched.h
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2014-08-08 17:53:55 -06:00 |
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Gregory Nutt
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23a334c066
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Move task control files from sched/ to sched/task
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2014-08-08 16:44:08 -06:00 |
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Gregory Nutt
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d4b56eb3cc
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Move clock functions from sched/ to sched/clock
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2014-08-08 14:43:02 -06:00 |
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Gregory Nutt
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85e8117062
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Move interrupt dispatch logic from sched/ to sched/irq
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2014-08-08 14:31:15 -06:00 |
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Gregory Nutt
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c9661ad5a7
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Change all time conversions. Yech. New timer units in microseconds breaks all existing logic that used milliseconds in the conversions. Something likely got broken doing this, probably because I confused a MSEC2TICK conversion with a TICK2MSEC conversion. Also, the tickless OS no appears fully functional and passes the OS test on the simulator with no errors
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2014-08-07 18:00:38 -06:00 |
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Gregory Nutt
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0aa7209765
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Change CONFIG_MSEC_PER_TICK to CONFIG_USEC_PER_TICK. This gives more options for system timers in general, but more importantly, let's us realize higher resolution for the case of CONFIG_SCHED_TICKLESS=y -- of course, at the risk of some new interger overvflow problems
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2014-08-07 13:42:47 -06:00 |
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Gregory Nutt
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520a51a3e1
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Implements the tickless OS
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2014-08-07 11:39:16 -06:00 |
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Gregory Nutt
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dc48bec019
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Add support for a simulated interval timer support verification of the tickless OS.
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2014-08-06 18:29:29 -06:00 |
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Gregory Nutt
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cc7cb0f031
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Don't build in sched_processtimer.c if CONFIG_SCHED_TICKLESS is selected.
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2014-08-06 18:27:10 -06:00 |
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Gregory Nutt
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0452b1555b
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if CONFIG_SCHED_TICKLESS is defined, then the global variable g_system_timer does not exist
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2014-08-06 18:26:16 -06:00 |
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Gregory Nutt
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736d3c169a
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Rename up_timerinit() to up_timer_initailize(); Add prototypes for candidate interfaces for the tickless OS; Don't build existing timer initialization logic if CONFIG_SCHED_TICKLESS is defined.
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2014-08-06 16:26:01 -06:00 |
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Gregory Nutt
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7b9c44101d
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SAMA5D3 HSMCI: TX DMA is again disabled
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2014-08-05 07:07:39 -06:00 |
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Gregory Nutt
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159bcc255d
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SAMA5 PCK: Add Main clock as an option for the PCK clock source
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2014-08-03 10:17:50 -06:00 |
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Gregory Nutt
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c75bf6d741
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SAMA5 SSC: Verify that the requested bit width is supported. Correct some alignment tests that depend upon the data bit width.
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2014-08-02 14:26:49 -06:00 |
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Gregory Nutt
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83dab03576
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SAMA5 WM8904: Fix errors in programmable clock output configuration
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2014-08-01 15:18:58 -06:00 |
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Gregory Nutt
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805a02965c
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SAMA5 SSC: Start Delay is now configurable
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2014-08-01 14:10:37 -06:00 |
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Gregory Nutt
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50bd2ba46c
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SAMA5 SSC: Frame Synch Delay is now configurable
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2014-08-01 12:25:31 -06:00 |
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Gregory Nutt
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0b4090df0d
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SAMA5D SSC: Needs to account for data offset in audio buffer.
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2014-07-31 19:14:24 -06:00 |
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Gregory Nutt
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c657139b30
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SAMA5D3X-EK: Add support for the WM8904 audio CODEC
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2014-07-31 11:14:57 -06:00 |
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Gregory Nutt
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24af676c05
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SAMA5: Changes needed for a clean SAMA5D3 build after all of the recent SAMA5D4 changes.
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2014-07-31 11:09:56 -06:00 |
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Gregory Nutt
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276cc44878
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SAMA5 HSMCI: e-enable TX DMA and verify that DMA writes to the SD card are functional. They are so now TX DMA is re-enabled in the driver. This might affect the SAMA5D3 platforms where the TX DMA problem was found. The SAMA4D3 and 4 use the same HSMCI driver. Much has change since then and it is not surprising that DMA is now functional. However, the has not be re-verified on the SAMA5D3 which has a different DMA controller.
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2014-07-30 11:20:06 -06:00 |
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Gregory Nutt
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4df0fbec04
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SAMA5D HSMCI: Fix a problem on card insertion/removal callback handling. Interrupts were being disable so that the callbacks occurred with interrupts disabled. This resulted in loss of some interrupts and some not-so-good behaviors. The solution is to perform all callbacks on the work thread unconditionally (2014-7-29).
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2014-07-30 10:19:41 -06:00 |
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Gregory Nutt
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70be3bae16
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SAMA5D HSMCI: Add method to do RX transfer without DMA. The 8-byte SCR transfer was failing silently with the DMA transfer, leaving the SD card in single bit mode
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2014-07-29 21:13:28 -06:00 |
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Gregory Nutt
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2861636015
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Cosmetic changes to comments
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2014-07-29 07:17:01 -06:00 |
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Gregory Nutt
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53930d5531
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SAMA5D-EK: Correct system timer frequency. Input clock is MCK/2, not MCK
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2014-07-29 07:12:36 -06:00 |
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Gregory Nutt
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1b6eec572d
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Cosmetic changes to comments
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2014-07-29 07:11:16 -06:00 |
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Gregory Nutt
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8c2b458d75
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Fixes to last SAMA5 PMIC checkin
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2014-07-28 17:09:37 -06:00 |
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Gregory Nutt
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d450993f2e
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LPC17xx: DC updates from Max. Also fixes some syntax errors that I introduced in the last commit.
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2014-07-28 07:23:49 -06:00 |
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Gregory Nutt
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100bba42be
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ARM: Move L2 cache initialization to much later in the sequence
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2014-07-27 10:03:33 -06:00 |
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Gregory Nutt
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c523abdc62
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ARMv7-A L2 Cache currently depends on EXPERIMENTAL because it does not yet work properly
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2014-07-26 18:48:54 -06:00 |
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Gregory Nutt
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4446d6e98d
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ARMv7 L2 Cache: Minor bugfixes/improvements
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2014-07-26 18:48:26 -06:00 |
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Gregory Nutt
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0519118de2
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Enables cache early in boot-up sequence
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2014-07-26 18:48:00 -06:00 |
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Gregory Nutt
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d09ee81320
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Change naming from cp_XYZ_cache() to arch_XYP_cache() so that all cache operations will pick up L2 support if it is enabled
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2014-07-26 18:47:33 -06:00 |
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Gregory Nutt
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0d83d198de
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New cache.h file. Renames cp15_XYZ_cache() to arch_XYZ_cache() and addes L2 cache support if L2 cache is enabled
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2014-07-26 18:46:52 -06:00 |
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Gregory Nutt
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ca3776a7ec
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Rename ARMv7-A cache.h to cp15_cache.h. Things will be broken on this commit until I get the new cache.h in place.
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2014-07-26 16:54:19 -06:00 |
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Gregory Nutt
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ec70cfe44c
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arch/arm/src/armv7-a/arm_l2cc_pl310.c, l2cc.h, l2cc_pl310.h, Kconfig: Add initiali support for the ARM L2CC-PL310 L2 cache.
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2014-07-26 16:50:08 -06:00 |
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Gregory Nutt
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be198337f7
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ARMv7-A: L2CC PL310 address filtering is an optional feature
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2014-07-25 19:46:09 -06:00 |
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Gregory Nutt
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ef5bfd72a6
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ARMv7-A: Add missing L2CC PL310 bit definitions
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2014-07-25 19:41:35 -06:00 |
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Gregory Nutt
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597c9839cc
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rch/arm/armv7-a/l2cc_pl310.h: Move arch/arm/sama5/chip/sam_l2cc.h to arch/arm/armv7-a/l2cc_pl310.h. Adjust the two corresponding Kconfig files as well.
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2014-07-25 17:25:17 -06:00 |
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Gregory Nutt
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47752a35c1
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3rd time is a charm. Max is right, the initial priority setting should be NVIC_SYSH_PRIORITY_MIN
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2014-07-24 16:51:07 -06:00 |
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