Gregory Nutt
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159bcc255d
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SAMA5 PCK: Add Main clock as an option for the PCK clock source
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2014-08-03 10:17:50 -06:00 |
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Gregory Nutt
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53930d5531
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SAMA5D-EK: Correct system timer frequency. Input clock is MCK/2, not MCK
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2014-07-29 07:12:36 -06:00 |
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Gregory Nutt
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bad3ad58cb
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SAMA5: Add slow clock support
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2014-07-19 13:07:55 -06:00 |
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Gregory Nutt
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a5538e3431
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SAMA5D3/4: UPLL divisor to generate 48MHz for OHCI is different from the two families. No idea why.
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2014-07-03 12:28:11 -06:00 |
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Gregory Nutt
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083986e814
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SAMA5D4: USART peripheral clock appears to be MCK/2
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2014-06-20 11:40:36 -06:00 |
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Gregory Nutt
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eb5a2d670c
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SAMA5 boards: Add set up for 528MHz CPU clock
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2014-04-03 17:12:17 -06:00 |
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Gregory Nutt
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aac2a6759d
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SAMA5D23 boards: When running out of SDRAM, need to query the PMC to determine operating frequency
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2014-03-29 17:51:06 -06:00 |
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Gregory Nutt
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1e7a14ed2e
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SAMA5D3x-EK: Fix lots of typos in board name
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2014-03-28 09:11:19 -06:00 |
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Gregory Nutt
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9d6bfb5238
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SAMA5: ADC and touchscreen drivers now build without errors
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2013-10-03 14:32:21 -06:00 |
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Gregory Nutt
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97a4ecb306
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SAMA Touchscreen/ADC: More progress
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2013-10-02 16:55:22 -06:00 |
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Gregory Nutt
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e92ed407aa
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SAMA5 ADC/Touchscreen: A little more logic
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2013-10-01 14:40:34 -06:00 |
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Gregory Nutt
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5c950889cf
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SAMA5 UDPHS: Support USPHS clock configuration
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2013-09-01 11:29:51 -06:00 |
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Gregory Nutt
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320a2e2a0a
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Beginning of support for SAMA5 EHCI. Not much there yet
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2013-08-20 15:46:36 -06:00 |
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Gregory Nutt
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371639637f
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SAMA5: Correct the PLL 48MHz divisor. It was off by a factor of two... no idea why
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2013-08-14 19:38:48 -06:00 |
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Gregory Nutt
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fe73fe2e23
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SAMA5: Alternatie clock configuration that yields a perfect 48MHz full speed USB clock and a CPU clock of 384MHz
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2013-08-14 15:16:04 -06:00 |
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